UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or FXSAVE/FXRESTOR

[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / Ia32 / ExceptionHandlerAsm.asm

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
index 3ff01b2a0c1112c7ca207f0a2ccf95fe246d89af..12bbec06909b2066a0608f6e13fbe5028cdcde84 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -250,10 +250,22 @@ ErrorCodeAndVectorOnStack:
     push    eax\r
 \r
 ;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
+    mov     eax, 1\r
+    push    ebx         ; temporarily save value of ebx on stack \r
+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR and DE \r
+                        ; are supported\r
+    pop     ebx         ; retore value of ebx that was overwritten by CPUID \r
     mov     eax, cr4\r
-    or      eax, 208h\r
+    push    eax         ; push cr4 firstly\r
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support\r
+    jz      @F\r
+    or      eax, BIT9   ; Set CR4.OSFXSR\r
+@@:    \r
+    test    edx, BIT2   ; Test for Debugging Extensions support\r
+    jz      @F\r
+    or      eax, BIT3   ; Set CR4.DE\r
+@@:    \r
     mov     cr4, eax\r
-    push    eax\r
     mov     eax, cr3\r
     push    eax\r
     mov     eax, cr2\r
@@ -280,7 +292,11 @@ ErrorCodeAndVectorOnStack:
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     sub     esp, 512\r
     mov     edi, esp\r
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.\r
+                        ; edx still contains result from CPUID above\r
+    jz      @F\r
     db      0fh, 0aeh, 07h ;fxsave [edi]\r
+@@:    \r
 \r
 ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -307,7 +323,13 @@ ErrorCodeAndVectorOnStack:
 \r
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     mov     esi, esp\r
+    mov     eax, 1\r
+    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR\r
+                        ; are supported\r
+    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support\r
+    jz      @F\r
     db      0fh, 0aeh, 0eh ; fxrstor [esi]\r
+@@:    \r
     add     esp, 512\r
 \r
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r