UefiCpuPkg/MpInitLib: Fix X64 XCODE5/NASM compatibility issues

[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.c

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 77d855a29a96eaf1212dd0b77dc99aca4c925501..735e099b32f28e934ca20603679574bf82a02a30 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1,7 +1,7 @@
 /** @file\r
   CPU MP Initialize Library common functions.\r
 \r
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -18,8 +18,11 @@ EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;
 \r
 /**\r
   The function will check if BSP Execute Disable is enabled.\r
-  DxeIpl may have enabled Execute Disable for BSP,\r
-  APs need to get the status and sync up the settings.\r
+\r
+  DxeIpl may have enabled Execute Disable for BSP, APs need to\r
+  get the status and sync up the settings.\r
+  If BSP's CR0.Paging is not set, BSP execute Disble feature is\r
+  not working actually.\r
 \r
   @retval TRUE      BSP Execute Disable is enabled.\r
   @retval FALSE     BSP Execute Disable is not enabled.\r
@@ -33,23 +36,30 @@ IsBspExecuteDisableEnabled (
   CPUID_EXTENDED_CPU_SIG_EDX  Edx;\r
   MSR_IA32_EFER_REGISTER      EferMsr;\r
   BOOLEAN                     Enabled;\r
+  IA32_CR0                    Cr0;\r
 \r
   Enabled = FALSE;\r
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
-  if (Eax >= CPUID_EXTENDED_CPU_SIG) {\r
-    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
+  Cr0.UintN = AsmReadCr0 ();\r
+  if (Cr0.Bits.PG != 0) {\r
     //\r
-    // CPUID 0x80000001\r
-    // Bit 20: Execute Disable Bit available.\r
+    // If CR0 Paging bit is set\r
     //\r
-    if (Edx.Bits.NX != 0) {\r
-      EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);\r
+    AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
+    if (Eax >= CPUID_EXTENDED_CPU_SIG) {\r
+      AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
       //\r
-      // MSR 0xC0000080\r
-      // Bit 11: Execute Disable Bit enable.\r
+      // CPUID 0x80000001\r
+      // Bit 20: Execute Disable Bit available.\r
       //\r
-      if (EferMsr.Bits.NXE != 0) {\r
-        Enabled = TRUE;\r
+      if (Edx.Bits.NX != 0) {\r
+        EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);\r
+        //\r
+        // MSR 0xC0000080\r
+        // Bit 11: Execute Disable Bit enable.\r
+        //\r
+        if (EferMsr.Bits.NXE != 0) {\r
+          Enabled = TRUE;\r
+        }\r
       }\r
     }\r
   }\r
@@ -110,7 +120,7 @@ SetApState (
 }\r
 \r
 /**\r
-  Save BSP's local APIC timer setting\r
+  Save BSP's local APIC timer setting.\r
 \r
   @param[in] CpuMpData          Pointer to CPU MP Data\r
 **/\r
@@ -372,13 +382,13 @@ ApInitializeSync (
 \r
   CpuMpData = (CPU_MP_DATA *) Buffer;\r
   //\r
-  // Sync BSP's MTRR table to AP\r
-  //\r
-  MtrrSetAllMtrrs (&CpuMpData->MtrrTable);\r
-  //\r
   // Load microcode on AP\r
   //\r
   MicrocodeDetect (CpuMpData);\r
+  //\r
+  // Sync BSP's MTRR table to AP\r
+  //\r
+  MtrrSetAllMtrrs (&CpuMpData->MtrrTable);\r
 }\r
 \r
 /**\r
@@ -424,6 +434,8 @@ CollectProcessorCount (
   IN CPU_MP_DATA         *CpuMpData\r
   )\r
 {\r
+  UINTN                  Index;\r
+\r
   //\r
   // Send 1st broadcast IPI to APs to wakeup APs\r
   //\r
@@ -455,6 +467,12 @@ CollectProcessorCount (
     // Enable x2APIC on BSP\r
     //\r
     SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+    //\r
+    // Set BSP/Aps state to IDLE\r
+    //\r
+    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+      SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);\r
+    }\r
   }\r
   DEBUG ((DEBUG_INFO, "APIC MODE is %d\n", GetApicMode ()));\r
   //\r
@@ -733,6 +751,8 @@ FillExchangeInfoData (
 \r
   ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();\r
 \r
+  ExchangeInfo->InitializeFloatingPointUnitsAddress = (UINTN)InitializeFloatingPointUnits;\r
+\r
   //\r
   // Get the BSP's data of GDT and IDT\r
   //\r
@@ -1354,6 +1374,10 @@ MpInitLibInitialize (
   // Store BSP's MTRR setting\r
   //\r
   MtrrGetAllMtrrs (&CpuMpData->MtrrTable);\r
+  //\r
+  // Enable the local APIC for Virtual Wire Mode.\r
+  //\r
+  ProgramVirtualWireMode ();\r
 \r
   if (OldCpuMpData == NULL) {\r
     if (MaxLogicalProcessorNumber > 1) {\r
@@ -1608,6 +1632,8 @@ SwitchBSPWorker (
   //\r
   if (!EnableOldBSP) {\r
     SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateDisabled);\r
+  } else {\r
+    SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateIdle);\r
   }\r
   //\r
   // Save new BSP number\r