/** @file\r
SMM STM support functions\r
\r
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
BOOLEAN mStmConfigurationTableInitialized = FALSE;\r
\r
-\r
/**\r
The constructor function\r
\r
EFI_HOB_GUID_TYPE *GuidHob;\r
EFI_SMRAM_DESCRIPTOR *SmramDescriptor;\r
\r
+ //\r
+ // Initialize address fixup\r
+ //\r
+ SmmCpuFeaturesLibStmSmiEntryFixupAddress ();\r
+\r
//\r
// Call the common constructor function\r
//\r
\r
/**\r
Internal worker function that is called to complete CPU initialization at the\r
- end of SmmCpuFeaturesInitializeProcessor()\r
+ end of SmmCpuFeaturesInitializeProcessor().\r
\r
**/\r
VOID\r
UINT32 RegEdx;\r
EFI_PROCESSOR_INFORMATION ProcessorInfo;\r
\r
- CopyMem ((VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));\r
- Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET);\r
+ CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));\r
+ Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);\r
Psd->SmmGdtPtr = GdtBase;\r
Psd->SmmGdtSize = (UINT32)GdtSize;\r
\r
// Copy template to CPU specific SMI handler location\r
//\r
CopyMem (\r
- (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),\r
+ (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),\r
(VOID*)gcStmSmiHandlerTemplate,\r
gcStmSmiHandlerSize\r
);\r
Psd->SmmSmiHandlerRsp = (UINTN)SmiStack + StackSize - sizeof(UINTN);\r
Psd->SmmCr3 = Cr3;\r
\r
- DEBUG((DEBUG_ERROR, "CpuSmmStmExceptionStackSize - %x\n", PcdGet32(PcdCpuSmmStmExceptionStackSize)));\r
- DEBUG((DEBUG_ERROR, "Pages - %x\n", EFI_SIZE_TO_PAGES(PcdGet32(PcdCpuSmmStmExceptionStackSize))));\r
+ DEBUG((DEBUG_INFO, "CpuSmmStmExceptionStackSize - %x\n", PcdGet32(PcdCpuSmmStmExceptionStackSize)));\r
+ DEBUG((DEBUG_INFO, "Pages - %x\n", EFI_SIZE_TO_PAGES(PcdGet32(PcdCpuSmmStmExceptionStackSize))));\r
Psd->StmProtectionExceptionHandler.SpeRsp = (UINT64)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuSmmStmExceptionStackSize)));\r
Psd->StmProtectionExceptionHandler.SpeRsp += EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuSmmStmExceptionStackSize)));\r
\r
Resource = ResourceList;\r
\r
for (Index = 0; Index < Count; Index++) {\r
- DEBUG ((DEBUG_ERROR, "ValidateResource (%d) - RscType(%x)\n", Index, Resource->Header.RscType));\r
+ DEBUG ((DEBUG_INFO, "ValidateResource (%d) - RscType(%x)\n", Index, Resource->Header.RscType));\r
//\r
// Validate resource.\r
//\r
break;\r
\r
case PCI_CFG_RANGE:\r
- DEBUG ((DEBUG_ERROR, "ValidateResource - PCI (0x%02x, 0x%08x, 0x%02x, 0x%02x)\n", Resource->PciCfg.OriginatingBusNumber, Resource->PciCfg.LastNodeIndex, Resource->PciCfg.PciDevicePath[0].PciDevice, Resource->PciCfg.PciDevicePath[0].PciFunction));\r
+ DEBUG ((DEBUG_INFO, "ValidateResource - PCI (0x%02x, 0x%08x, 0x%02x, 0x%02x)\n", Resource->PciCfg.OriginatingBusNumber, Resource->PciCfg.LastNodeIndex, Resource->PciCfg.PciDevicePath[0].PciDevice, Resource->PciCfg.PciDevicePath[0].PciFunction));\r
if (Resource->Header.Length != sizeof (STM_RSC_PCI_CFG_DESC) + (sizeof(STM_PCI_DEVICE_PATH_NODE) * Resource->PciCfg.LastNodeIndex)) {\r
return FALSE;\r
}\r