UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain

[mirror_edk2.git] / UefiCpuPkg / Library / SmmCpuFeaturesLib / X64 / SmiEntry.nasm

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
index bcac643e962cf47604d70a428d80f8e2fe7faf87..90a9fd489b40dd5654d8f39ec869f04db4dbaf1d 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -164,7 +164,8 @@ Base:
     mov     cr0, rbx\r
     retf\r
 @LongMode:                              ; long mode (64-bit code) starts here\r
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+    mov     rax, strict qword 0         ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+StmSmiEntrySmiHandlerIdtrAbsAddr:\r
     lidt    [rax]\r
     lea     ebx, [rdi + DSC_OFFSET]\r
     mov     ax, [rbx + DSC_DS]\r
@@ -175,7 +176,9 @@ Base:
     mov     gs, eax\r
     mov     ax, [rbx + DSC_SS]\r
     mov     ss, eax\r
-\r
+    mov     rax, strict qword 0           ;   mov     rax, CommonHandler\r
+StmSmiEntryCommonHandlerAbsAddr:\r
+    jmp     rax\r
 CommonHandler:\r
     mov     rbx, [rsp + 0x08]             ; rbx <- CpuIndex\r
 \r
@@ -188,16 +191,13 @@ CommonHandler:
     add     rsp, -0x20\r
 \r
     mov     rcx, rbx\r
-    mov     rax, CpuSmmDebugEntry\r
-    call    rax\r
+    call    ASM_PFX(CpuSmmDebugEntry)\r
 \r
     mov     rcx, rbx\r
-    mov     rax, SmiRendezvous          ; rax <- absolute addr of SmiRedezvous\r
-    call    rax\r
+    call    ASM_PFX(SmiRendezvous)\r
 \r
     mov     rcx, rbx\r
-    mov     rax, CpuSmmDebugExit\r
-    call    rax\r
+    call    ASM_PFX(CpuSmmDebugExit)\r
 \r
     add     rsp, 0x20\r
 \r
@@ -208,7 +208,7 @@ CommonHandler:
 \r
     add     rsp, 0x200\r
 \r
-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .1\r
@@ -228,7 +228,7 @@ _StmSmiHandler:
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r
-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone\r
@@ -249,8 +249,8 @@ _StmSmiHandler:
 \r
     ; below step is needed, because STM does not run above code.\r
     ; we have to run below code to set IDT/CR0/CR4\r
-\r
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+    mov     rax, strict qword 0        ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+StmSmiHandlerIdtrAbsAddr:\r
     lidt    [rax]\r
 \r
     mov     rax, cr0\r
@@ -264,3 +264,16 @@ _StmSmiHandler:
 \r
 ASM_PFX(gcStmSmiHandlerSize)   : DW      $ - _StmSmiEntryPoint\r
 ASM_PFX(gcStmSmiHandlerOffset) : DW      _StmSmiHandler - _StmSmiEntryPoint\r
+\r
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)\r
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):\r
+    lea    rax, [ASM_PFX(gStmSmiHandlerIdtr)]\r
+    lea    rcx, [StmSmiEntrySmiHandlerIdtrAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+    lea    rcx, [StmSmiHandlerIdtrAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+\r
+    lea    rax, [CommonHandler]\r
+    lea    rcx, [StmSmiEntryCommonHandlerAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+    ret\r