UefiCpuPkg: Remove X86 ASM and S files

[mirror_edk2.git] / UefiCpuPkg / Library / SmmCpuFeaturesLib / X64 / SmiException.asm

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm
deleted file mode 100644 (file)
index 33e9860..0000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm
+++ /dev/null
@@ -1,178 +0,0 @@
-;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution.  The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-;   SmiException.asm\r
-;\r
-; Abstract:\r
-;\r
-;   Exception handlers used in SM mode\r
-;\r
-;-------------------------------------------------------------------------------\r
-\r
-EXTERNDEF   gcStmPsd:BYTE\r
-\r
-EXTERNDEF   SmmStmExceptionHandler:PROC\r
-EXTERNDEF   SmmStmSetup:PROC\r
-EXTERNDEF   SmmStmTeardown:PROC\r
-EXTERNDEF   gStmXdSupported:BYTE\r
-\r
-CODE_SEL    EQU 38h\r
-DATA_SEL    EQU 20h\r
-TR_SEL      EQU 40h\r
-\r
-MSR_IA32_MISC_ENABLE  EQU     1A0h\r
-MSR_EFER              EQU     0c0000080h\r
-MSR_EFER_XD           EQU     0800h\r
-\r
-    .data\r
-\r
-;\r
-; This structure serves as a template for all processors.\r
-;\r
-gcStmPsd     LABEL   BYTE\r
-            DB      'TXTPSSIG'\r
-            DW      PSD_SIZE\r
-            DW      1              ; Version\r
-            DD      0              ; LocalApicId\r
-            DB      0Fh            ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr\r
-            DB      0              ; BIOS to STM\r
-            DB      0              ; STM to BIOS\r
-            DB      0\r
-            DW      CODE_SEL\r
-            DW      DATA_SEL\r
-            DW      DATA_SEL\r
-            DW      DATA_SEL\r
-            DW      TR_SEL\r
-            DW      0\r
-            DQ      0              ; SmmCr3\r
-            DQ      _OnStmSetup\r
-            DQ      _OnStmTeardown\r
-            DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint\r
-            DQ      0              ; SmmSmiHandlerRsp\r
-            DQ      0\r
-            DD      0\r
-            DD      80010100h      ; RequiredStmSmmRevId\r
-            DQ      _OnException\r
-            DQ      0              ; ExceptionStack\r
-            DW      DATA_SEL\r
-            DW      01Fh           ; ExceptionFilter\r
-            DD      0\r
-            DQ      0\r
-            DQ      0              ; BiosHwResourceRequirementsPtr\r
-            DQ      0              ; AcpiRsdp\r
-            DB      0              ; PhysicalAddressBits\r
-PSD_SIZE  = $ - offset gcStmPsd\r
-\r
-    .code\r
-;------------------------------------------------------------------------------\r
-; SMM Exception handlers\r
-;------------------------------------------------------------------------------\r
-_OnException       PROC\r
-    mov  rcx, rsp\r
-    add  rsp, -28h\r
-    call SmmStmExceptionHandler\r
-    add  rsp, 28h\r
-    mov  ebx, eax\r
-    mov  eax, 4\r
-    DB  0fh, 01h, 0c1h ; VMCALL\r
-    jmp $\r
-_OnException       ENDP\r
-\r
-_OnStmSetup PROC\r
-;\r
-; Check XD disable bit\r
-;\r
-    xor     r8, r8\r
-    mov     rax, offset ASM_PFX(gStmXdSupported)\r
-    mov     al, [rax]\r
-    cmp     al, 0\r
-    jz      @StmXdDone1\r
-    mov     ecx, MSR_IA32_MISC_ENABLE\r
-    rdmsr\r
-    mov     r8, rdx                   ; save MSR_IA32_MISC_ENABLE[63-32]\r
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]\r
-    jz      @f\r
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set\r
-    wrmsr\r
-@@:\r
-    mov     ecx, MSR_EFER\r
-    rdmsr\r
-    or      ax, MSR_EFER_XD            ; enable NXE\r
-    wrmsr\r
-@StmXdDone1:\r
-    push    r8\r
-\r
-  add  rsp, -20h\r
-  call SmmStmSetup\r
-  add  rsp, 20h\r
-\r
-    mov     rax, offset ASM_PFX(gStmXdSupported)\r
-    mov     al, [rax]\r
-    cmp     al, 0\r
-    jz      @f\r
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]\r
-    test    edx, BIT2\r
-    jz      @f\r
-    mov     ecx, MSR_IA32_MISC_ENABLE\r
-    rdmsr\r
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM\r
-    wrmsr\r
-@@:\r
-\r
-  rsm\r
-_OnStmSetup ENDP\r
-\r
-_OnStmTeardown PROC\r
-;\r
-; Check XD disable bit\r
-;\r
-    xor     r8, r8\r
-    mov     rax, offset ASM_PFX(gStmXdSupported)\r
-    mov     al, [rax]\r
-    cmp     al, 0\r
-    jz      @StmXdDone2\r
-    mov     ecx, MSR_IA32_MISC_ENABLE\r
-    rdmsr\r
-    mov     r8, rdx                   ; save MSR_IA32_MISC_ENABLE[63-32]\r
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]\r
-    jz      @f\r
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set\r
-    wrmsr\r
-@@:\r
-    mov     ecx, MSR_EFER\r
-    rdmsr\r
-    or      ax, MSR_EFER_XD            ; enable NXE\r
-    wrmsr\r
-@StmXdDone2:\r
-    push    r8\r
-\r
-  add  rsp, -20h\r
-  call SmmStmTeardown\r
-  add  rsp, 20h\r
-\r
-    mov     rax, offset ASM_PFX(gStmXdSupported)\r
-    mov     al, [rax]\r
-    cmp     al, 0\r
-    jz      @f\r
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]\r
-    test    edx, BIT2\r
-    jz      @f\r
-    mov     ecx, MSR_IA32_MISC_ENABLE\r
-    rdmsr\r
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM\r
-    wrmsr\r
-@@:\r
-\r
-  rsm\r
-_OnStmTeardown ENDP\r
-\r
-    END\r