UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / Cet.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
new file mode 100644 (file)
index 0000000..aa6b5e3
--- /dev/null
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;-------------------------------------------------------------------------------\r
+\r
+%include "Nasm.inc"\r
+\r
+SECTION .text\r
+\r
+global ASM_PFX(DisableCet)\r
+ASM_PFX(DisableCet):\r
+\r
+    ; Skip the pushed data for call\r
+    mov     eax, 1\r
+    INCSSP_EAX\r
+\r
+    mov     eax, cr4\r
+    btr     eax, 23                      ; clear CET\r
+    mov     cr4, eax\r
+    ret\r
+\r
+global ASM_PFX(EnableCet)\r
+ASM_PFX(EnableCet):\r
+\r
+    mov     eax, cr4\r
+    bts     eax, 23                      ; set CET\r
+    mov     cr4, eax\r
+\r
+    ; use jmp to skip the check for ret\r
+    pop     eax\r
+    jmp     eax\r
+\r