UefiCpuPkg/PiSmmCpuDxeSmm: use mnemonics for FXSAVE(64)/FXRSTOR(64)

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmiException.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
index 7c80a6ae91c274b38ec5bd3579e64c42adf53f62..fa02c1016ce70c1e92745195ed4886c542c9ec2a 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
@@ -382,7 +382,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     sub     esp, 512\r
     mov     edi, esp\r
-    db      0xf, 0xae, 0x7 ;fxsave [edi]\r
+    fxsave  [edi]\r
 \r
 ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -410,7 +410,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
 \r
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     mov     esi, esp\r
-    db      0xf, 0xae, 0xe ; fxrstor [esi]\r
+    fxrstor [esi]\r
     add     esp, 512\r
 \r
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
@@ -582,7 +582,7 @@ PFHandlerEntry:
     clts\r
     sub     esp, 512\r
     mov     edi, esp\r
-    db      0xf, 0xae, 0x7 ;fxsave [edi]\r
+    fxsave  [edi]\r
 \r
 ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -612,7 +612,7 @@ PFHandlerEntry:
 \r
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     mov     esi, esp\r
-    db      0xf, 0xae, 0xe ; fxrstor [esi]\r
+    fxrstor [esi]\r
     add     esp, 512\r
 \r
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r