UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index d64fcd48d03ed8820c4a0eab069c58ec35d5b7e4..f7bb9b9a82e52f216f8e1e21cdd5f991b449eba8 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler)
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
 \r
-global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gSmmCr4)\r
 global ASM_PFX(gSmmCr0)\r
 global ASM_PFX(gSmmJmpAddr)\r
@@ -49,8 +49,8 @@ ASM_PFX(SmmStartup):
     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.\r
     and     ebx, BIT20                  ; extract NX capability bit\r
     shr     ebx, 9                      ; shift bit to IA32_EFER.NXE[BIT11] position\r
-    DB      0x66, 0xb8                  ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
     mov     cr3, eax\r
 o32 lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
     DB      0x66, 0xb8                  ; mov eax, imm32\r