UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page table by default

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / SmmProfile.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index ff4e28ec58e43572fcb0057e24d859ed102d0628..ec4ec9b067c5c6ace339731d7ba31d3299ab7fef 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -557,9 +557,9 @@ InitPaging (
 \r
           // Split it\r
           for (Level4 = 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++) {\r
-            Pt[Level4] = Address + ((Level4 << 12) | IA32_PG_RW | IA32_PG_P);\r
+            Pt[Level4] = Address + ((Level4 << 12) | PAGE_ATTRIBUTE_BITS);\r
           } // end for PT\r
-          *Pte = (UINTN)Pt | IA32_PG_RW | IA32_PG_P;\r
+          *Pte = (UINTN)Pt | PAGE_ATTRIBUTE_BITS;\r
         } // end if IsAddressSplit\r
       } // end for PTE\r
     } // end for PDE\r
@@ -608,7 +608,7 @@ InitPaging (
             //\r
             // Patch to remove Present flag and RW flag\r
             //\r
-            *Pte = *Pte & (INTN)(INT32)(~(IA32_PG_RW | IA32_PG_P));\r
+            *Pte = *Pte & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS);\r
           }\r
           if (Nx && mXdSupported) {\r
             *Pte = *Pte | IA32_PG_NX;\r
@@ -621,7 +621,7 @@ InitPaging (
           }\r
           for (Level4 = 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++, Pt++) {\r
             if (!IsAddressValid (Address, &Nx)) {\r
-              *Pt = *Pt & (INTN)(INT32)(~(IA32_PG_RW | IA32_PG_P));\r
+              *Pt = *Pt & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS);\r
             }\r
             if (Nx && mXdSupported) {\r
               *Pt = *Pt | IA32_PG_NX;\r
@@ -1244,7 +1244,7 @@ RestorePageTableBelow4G (
     //\r
     PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1));\r
     PageTable[PTIndex] |= (UINT64)IA32_PG_PS;\r
-    PageTable[PTIndex] |= (UINT64)(IA32_PG_RW | IA32_PG_P);\r
+    PageTable[PTIndex] |= (UINT64)PAGE_ATTRIBUTE_BITS;\r
     if ((ErrorCode & IA32_PF_EC_ID) != 0) {\r
       PageTable[PTIndex] &= ~IA32_PG_NX;\r
     }\r
@@ -1277,7 +1277,7 @@ RestorePageTableBelow4G (
     // Set new entry\r
     //\r
     PageTable[PTIndex] = (PFAddress & ~((1ull << 12) - 1));\r
-    PageTable[PTIndex] |= (UINT64)(IA32_PG_RW | IA32_PG_P);\r
+    PageTable[PTIndex] |= (UINT64)PAGE_ATTRIBUTE_BITS;\r
     if ((ErrorCode & IA32_PF_EC_ID) != 0) {\r
       PageTable[PTIndex] &= ~IA32_PG_NX;\r
     }\r