UefiCpuPkg/PiSmmCpu: Always set RW+P bit for page table by default

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / PageTbl.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index a7d790fd8aa044662ac40608c2b293a54fd95c05..5b11e5eb48a836a19c47512db0af4ddf6696a244 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -113,7 +113,7 @@ SmmInitPageTable (
   //\r
   // Generate PAE page table for the first 4GB memory space\r
   //\r
-  Pages = Gen4GPageTable (PAGE_TABLE_PAGES + 1);\r
+  Pages = Gen4GPageTable (PAGE_TABLE_PAGES + 1, FALSE);\r
 \r
   //\r
   // Set IA32_PG_PMNT bit to mask this entry\r
@@ -127,7 +127,7 @@ SmmInitPageTable (
   // Fill Page-Table-Level4 (PML4) entry\r
   //\r
   PTEntry = (UINT64*)(UINTN)(Pages - EFI_PAGES_TO_SIZE (PAGE_TABLE_PAGES + 1));\r
-  *PTEntry = Pages + IA32_PG_P;\r
+  *PTEntry = Pages + PAGE_ATTRIBUTE_BITS;\r
   ZeroMem (PTEntry + 1, EFI_PAGE_SIZE - sizeof (*PTEntry));\r
   //\r
   // Set sub-entries number\r
@@ -591,7 +591,7 @@ SmiDefaultPFHandler (
         //\r
         // If the entry is not present, allocate one page from page pool for it\r
         //\r
-        PageTable[PTIndex] = AllocPage () | IA32_PG_RW | IA32_PG_P;\r
+        PageTable[PTIndex] = AllocPage () | PAGE_ATTRIBUTE_BITS;\r
       } else {\r
         //\r
         // Save the upper entry address\r
@@ -621,7 +621,7 @@ SmiDefaultPFHandler (
     // Fill the new entry\r
     //\r
     PageTable[PTIndex] = (PFAddress & gPhyMask & ~((1ull << EndBit) - 1)) |\r
-                         PageAttribute | IA32_PG_A | IA32_PG_RW | IA32_PG_P;\r
+                         PageAttribute | IA32_PG_A | PAGE_ATTRIBUTE_BITS;\r
     if (UpperEntry != NULL) {\r
       SetSubEntriesNum (UpperEntry, GetSubEntriesNum (UpperEntry) + 1);\r
     }\r