UefiCpuPkg/PiSmmCpuDxeSmm: patch "XdSupported" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmiEntry.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index 697fd2bec7c616c8d1fd855dd3afccf4f846afcb..5d731e2280957a418f53b5707a60414ca9b7ab73 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -53,10 +53,11 @@ extern ASM_PFX(gSmiHandlerIdtr)
 extern ASM_PFX(CpuSmmDebugEntry)\r
 extern ASM_PFX(CpuSmmDebugExit)\r
 \r
-global ASM_PFX(gSmbase)\r
-global ASM_PFX(mXdSupported)\r
-global ASM_PFX(gSmiStack)\r
-global ASM_PFX(gSmiCr3)\r
+global ASM_PFX(gPatchSmbase)\r
+extern ASM_PFX(mXdSupported)\r
+global ASM_PFX(gPatchXdSupported)\r
+global ASM_PFX(gPatchSmiStack)\r
+global ASM_PFX(gPatchSmiCr3)\r
 global ASM_PFX(gcSmiHandlerTemplate)\r
 global ASM_PFX(gcSmiHandlerSize)\r
 \r
@@ -75,8 +76,8 @@ _SmiEntryPoint:
 o32 lgdt    [cs:bx]                       ; lgdt fword ptr cs:[bx]\r
     mov     ax, PROTECT_MODE_CS\r
     mov     [cs:bx-0x2],ax\r
-    DB      0x66, 0xbf                   ; mov edi, SMBASE\r
-ASM_PFX(gSmbase): DD 0\r
+    mov     edi, strict dword 0           ; source operand will be patched\r
+ASM_PFX(gPatchSmbase):\r
     lea     eax, [edi + (@ProtectedMode - _SmiEntryPoint) + 0x8000]\r
     mov     [cs:bx-0x6],eax\r
     mov     ebx, cr0\r
@@ -96,14 +97,14 @@ o16 mov     es, ax
 o16 mov     fs, ax\r
 o16 mov     gs, ax\r
 o16 mov     ss, ax\r
-    DB      0xbc                   ; mov esp, imm32\r
-ASM_PFX(gSmiStack): DD 0\r
+    mov esp, strict dword 0               ; source operand will be patched\r
+ASM_PFX(gPatchSmiStack):\r
     jmp     ProtFlatMode\r
 \r
 BITS 64\r
 ProtFlatMode:\r
-    DB      0xb8                        ; mov eax, offset gSmiCr3\r
-ASM_PFX(gSmiCr3): DD 0\r
+    mov eax, strict dword 0               ; source operand will be patched\r
+ASM_PFX(gPatchSmiCr3):\r
     mov     cr3, rax\r
     mov     eax, 0x668                   ; as cr4.PGE is not set here, refresh cr3\r
     mov     cr4, rax                    ; in PreModifyMtrrs() to flush TLB.\r
@@ -118,8 +119,8 @@ ASM_PFX(gSmiCr3): DD 0
     ltr     ax\r
 \r
 ; enable NXE if supported\r
-    DB      0xb0                        ; mov al, imm8\r
-ASM_PFX(mXdSupported):     DB      1\r
+    mov     al, strict byte 1           ; source operand may be patched\r
+ASM_PFX(gPatchXdSupported):\r
     cmp     al, 0\r
     jz      @SkipXd\r
 ;\r