UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection.

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmiException.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
index 821ee182b6f94c74de6a951bfb25db49577ccfd9..bc8d95d8dc99e6edaa5aea563921d887e844174c 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm
@@ -145,25 +145,8 @@ ASM_PFX(gcSmiGdtr):
     DQ        NullSeg\r
 \r
 ASM_PFX(gcSmiIdtr):\r
-    DW      IDT_SIZE - 1\r
-    DQ        _SmiIDT\r
-\r
-;\r
-; Here is the IDT. There are 32 (not 255) entries in it since only processor\r
-; generated exceptions will be handled.\r
-;\r
-_SmiIDT:\r
-%rep 32\r
-    DW      0                           ;   0:15\r
-    DW      CODE_SEL                    ; Segment selector\r
-    DB      0                           ; Unused\r
-    DB      0x8e                         ; Interrupt Gate, Present\r
-    DW      0                           ;   16:31\r
-    DQ      0                           ;   32:63\r
-%endrep\r
-_SmiIDTEnd:\r
-\r
-IDT_SIZE equ  _SmiIDTEnd -   _SmiIDT\r
+    DW      0\r
+    DQ      0\r
 \r
     DEFAULT REL\r
     SECTION .text\r
@@ -400,13 +383,3 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
     add     rsp, 16           ; skip INT# & ErrCode\r
     iretq\r
 \r
-global ASM_PFX(InitializeIDTSmmStackGuard)\r
-ASM_PFX(InitializeIDTSmmStackGuard):\r
-;\r
-; If SMM Stack Guard feature is enabled, set the IST field of\r
-; the interrupt gate for Page Fault Exception to be 1\r
-;\r
-    lea     rax, [_SmiIDT + 14 * 16]\r
-    mov     byte [rax + 4], 1\r
-    ret\r
-\r