UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmInitStack" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 2460e1eb2dee91d2e0388ffe32044d7ebad0b471..eae14c0549f0d9a04a7d59bfe113845f62232ea2 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -25,7 +25,7 @@ extern ASM_PFX(mSmmRelocationOriginalAddress)
 global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gPatchSmmCr4)\r
 global ASM_PFX(gPatchSmmCr0)\r
-global ASM_PFX(gSmmInitStack)\r
+global ASM_PFX(gPatchSmmInitStack)\r
 global ASM_PFX(gcSmiInitGdtr)\r
 global ASM_PFX(gcSmmInitSize)\r
 global ASM_PFX(gcSmmInitTemplate)\r
@@ -72,8 +72,8 @@ ASM_PFX(gPatchSmmCr0):
 \r
 BITS 64\r
 @LongMode:                              ; long-mode starts here\r
-    DB      0x48, 0xbc                   ; mov rsp, imm64\r
-ASM_PFX(gSmmInitStack): DQ 0\r
+    mov     rsp, strict qword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmInitStack):\r
     and     sp, 0xfff0                  ; make sure RSP is 16-byte aligned\r
     ;\r
     ; Accoring to X64 calling convention, XMM0~5 are volatile, we need to save\r