; located just below 0x100000000 (4GB) in the firmware device.\r
;\r
%ifdef ALIGN_TOP_TO_4K_FOR_PAGING\r
- TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0\r
+ TIMES (0x1000 - ($ - EndOfPageTables)) DB 0\r
+;\r
+; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block.\r
+; Some implementations may need to keep the initial Reset code\r
+; to be separated out from rest of the code.\r
+; This padding will make sure lower 4K region below 4 GB may\r
+; only contains few jmp instructions and data.\r
+;\r
+ TIMES (0x1000 - 0x20) DB 0\r
%endif\r
\r
applicationProcessorEntryPoint:\r