## @file UefiCpuPkg.dec\r
# This Package provides UEFI compatible CPU modules and libraries.\r
#\r
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are licensed and made available under\r
# the terms and conditions of the BSD License which accompanies this distribution.\r
## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.\r
##\r
LocalApicLib|Include/Library/LocalApicLib.h\r
- \r
+\r
+ ## @libraryclass Provides platform specific initialization functions in the SEC phase.\r
+ ##\r
+ PlatformSecLib|Include/Library/PlatformSecLib.h\r
+\r
+ ## @libraryclass Public include file for the SMM CPU Platform Hook Library.\r
+ ##\r
+ SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h\r
+\r
+ ## @libraryclass Provides the CPU specific programming for PiSmmCpuDxeSmm module.\r
+ ##\r
+ SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h\r
+\r
[Guids]\r
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}\r
\r
+[Protocols]\r
+ ## Include/Protocol/SmmCpuService.h\r
+ gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}\r
+\r
#\r
# [Error.gUefiCpuPkgTokenSpaceGuid]\r
# 0x80000001 | Invalid value provided.\r
#\r
\r
+[PcdsFeatureFlag]\r
+ ## Indicates if SMM Profile will be enabled.\r
+ # If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.\r
+ # This PCD is only for validation purpose. It should be set to false in production.<BR><BR>\r
+ # TRUE - SMM Profile will be enabled.<BR>\r
+ # FALSE - SMM Profile will be disabled.<BR>\r
+ # @Prompt Enable SMM Profile.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109\r
+\r
+ ## Indicates if the SMM profile log buffer is a ring buffer.\r
+ # If disabled, no additional log can be done when the buffer is full.<BR><BR>\r
+ # TRUE - the SMM profile log buffer is a ring buffer.<BR>\r
+ # FALSE - the SMM profile log buffer is a normal buffer.<BR>\r
+ # @Prompt The SMM profile log buffer is a ring buffer.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a\r
+\r
+ ## Indicates if SMM Startup AP in a blocking fashion.\r
+ # TRUE - SMM Startup AP in a blocking fashion.<BR>\r
+ # FALSE - SMM Startup AP in a non-blocking fashion.<BR>\r
+ # @Prompt SMM Startup AP in a blocking fashion.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108\r
+\r
+ ## Indicates if SMM Stack Guard will be enabled.\r
+ # If enabled, stack overflow in SMM can be caught which eases debugging.<BR><BR>\r
+ # TRUE - SMM Stack Guard will be enabled.<BR>\r
+ # FALSE - SMM Stack Guard will be disabled.<BR>\r
+ # @Prompt Enable SMM Stack Guard.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|FALSE|BOOLEAN|0x1000001C\r
+\r
+ ## Indicates if BSP election in SMM will be enabled.\r
+ # If enabled, a BSP will be dynamically elected among all processors in each SMI.\r
+ # Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>\r
+ # TRUE - BSP election in SMM will be enabled.<BR>\r
+ # FALSE - BSP election in SMM will be disabled.<BR>\r
+ # @Prompt Enable BSP election in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106\r
+\r
+ ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>\r
+ # TRUE - SMM CPU hot-plug will be enabled.<BR>\r
+ # FALSE - SMM CPU hot-plug will be disabled.<BR>\r
+ # @Prompt SMM CPU hot-plug.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C\r
+\r
+ ## Indicates if SMM Debug will be enabled.\r
+ # If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>\r
+ # TRUE - SMM Debug will be enabled.<BR>\r
+ # FALSE - SMM Debug will be disabled.<BR>\r
+ # @Prompt Enable SMM Debug.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B\r
+\r
+ ## Indicates if lock SMM Feature Control MSR.<BR><BR>\r
+ # TRUE - SMM Feature Control MSR will be locked.<BR>\r
+ # FALSE - SMM Feature Control MSR will not be locked.<BR>\r
+ # @Prompt Lock SMM Feature Control MSR.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B\r
+\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
- ## This value is the CPU Local Apic base address, which aligns the address on a 4-KByte boundary.\r
- # @Prompt Configure base address of CPU Local Apic\r
+ ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.\r
+ # @Prompt Configure base address of CPU Local APIC\r
# @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001\r
+\r
## Specifies delay value in microseconds after sending out an INIT IPI.\r
# @Prompt Configure delay value after send an INIT IPI\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002\r
- ## Specifies max supported number of Logical Processors.\r
- # @Prompt Configure max supported number of Logical Processorss\r
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
+\r
## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must\r
## aligns the address on a 4-KByte boundary.\r
# @Prompt Configure stack size for Application Processor (AP)\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003\r
\r
+ ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.\r
+ # @Prompt Stack size in the temporary RAM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003\r
+\r
+ ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.\r
+ # @Prompt SMM profile data buffer size.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107\r
+\r
+ ## Specifies stack size in bytes for each processor in SMM.\r
+ # @Prompt Processor stack size in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105\r
+\r
+ ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.\r
+ # @Prompt AP synchronization timeout value in SMM.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104\r
+\r
+ ## Indicates if SMM Code Access Check is enabled.\r
+ # If enabled, the SMM handler cannot execute the code outside SMM regions.\r
+ # This PCD is suggested to TRUE in production image.<BR><BR>\r
+ # TRUE - SMM Code Access Check will be enabled.<BR>\r
+ # FALSE - SMM Code Access Check will be disabled.<BR>\r
+ # @Prompt SMM Code Access Check.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013\r
+\r
+ ## Indicates the CPU synchronization method used when processing an SMI.\r
+ # 0x00 - Traditional CPU synchronization method.<BR>\r
+ # 0x01 - Relaxed CPU synchronization method.<BR>\r
+ # @Prompt SMM CPU Synchronization Method.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014\r
+\r
+ ## Specifies the number of variable MTRRs reserved for OS use. The default number of\r
+ # MTRRs reserved for OS use is 2.\r
+ # @Prompt Number of reserved variable MTRRs.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015\r
+\r
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
+ ## Specifies max supported number of Logical Processors.\r
+ # @Prompt Configure max supported number of Logical Processors\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002\r
## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.\r
# @Prompt Timeout for the BSP to detect all APs for the first time.\r
gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004\r
+ ## Specifies the base address of the first microcode Patch in the microcode Region.\r
+ # @Prompt Microcode Region base address.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005\r
+ ## Specifies the size of the microcode Region.\r
+ # @Prompt Microcode Region size.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006\r
+ ## Specifies the AP wait loop state during POST phase.\r
+ # The value is defined as below.<BR><BR>\r
+ # 1: Place AP in the Hlt-Loop state.<BR>\r
+ # 2: Place AP in the Mwait-Loop state.<BR>\r
+ # 3: Place AP in the Run-Loop state.<BR>\r
+ # @Prompt The AP wait loop state.\r
+ # @ValidRange 0x80000001 | 1 - 3\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006\r
+ ## Specifies the AP target C-state for Mwait during POST phase.\r
+ # The default value 0 means C1 state.\r
+ # The value is defined as below.<BR><BR>\r
+ # @Prompt The specified AP target C-state for Mwait.\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007\r
+\r
+[PcdsDynamic, PcdsDynamicEx]\r
+ ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.\r
+ # @Prompt The pointer to a CPU S3 data buffer.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010\r
+\r
+ ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.\r
+ # @Prompt The pointer to CPU Hot Plug Data.\r
+ # @ValidList 0x80000001 | 0\r
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011\r
\r
[UserExtensions.TianoCore."ExtraFiles"]\r
UefiCpuPkgExtra.uni\r
projects / mirror_edk2.git / blobdiff