--- /dev/null
+/**\r
+\r
+Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved\r
+\r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution.\r
+ The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+\r
+\r
+ @file\r
+ PchRegs.h\r
+\r
+ @brief\r
+ Register names for VLV SC.\r
+\r
+ Conventions:\r
+\r
+ - Prefixes:\r
+ Definitions beginning with "R_" are registers\r
+ Definitions beginning with "B_" are bits within registers\r
+ Definitions beginning with "V_" are meaningful values of bits within the registers\r
+ Definitions beginning with "S_" are register sizes\r
+ Definitions beginning with "N_" are the bit position\r
+ - In general, PCH registers are denoted by "_PCH_" in register names\r
+ - Registers / bits that are different between PCH generations are denoted by\r
+ "_PCH_<generation_name>_" in register/bit names. e.g., "_PCH_VLV_"\r
+ - Registers / bits that are different between SKUs are denoted by "_<SKU_name>"\r
+ at the end of the register/bit names\r
+ - Registers / bits of new devices introduced in a PCH generation will be just named\r
+ as "_PCH_" without <generation_name> inserted.\r
+\r
+**/\r
+#ifndef _PCH_REGS_H_\r
+#define _PCH_REGS_H_\r
+\r
+///\r
+/// Bit Definitions. BUGBUG: drive these definitions to code base. Should not need\r
+/// to be part of chipset modules\r
+///\r
+#ifndef BIT0\r
+#define BIT0 0x0001\r
+#define BIT1 0x0002\r
+#define BIT2 0x0004\r
+#define BIT3 0x0008\r
+#define BIT4 0x0010\r
+#define BIT5 0x0020\r
+#define BIT6 0x0040\r
+#define BIT7 0x0080\r
+#define BIT8 0x0100\r
+#define BIT9 0x0200\r
+#define BIT10 0x0400\r
+#define BIT11 0x0800\r
+#define BIT12 0x1000\r
+#define BIT13 0x2000\r
+#define BIT14 0x4000\r
+#define BIT15 0x8000\r
+#define BIT16 0x00010000\r
+#define BIT17 0x00020000\r
+#define BIT18 0x00040000\r
+#define BIT19 0x00080000\r
+#define BIT20 0x00100000\r
+#define BIT21 0x00200000\r
+#define BIT22 0x00400000\r
+#define BIT23 0x00800000\r
+#define BIT24 0x01000000\r
+#define BIT25 0x02000000\r
+#define BIT26 0x04000000\r
+#define BIT27 0x08000000\r
+#define BIT28 0x10000000\r
+#define BIT29 0x20000000\r
+#define BIT30 0x40000000\r
+#define BIT31 0x80000000\r
+#define BIT32 0x100000000\r
+#define BIT33 0x200000000\r
+#define BIT34 0x400000000\r
+#define BIT35 0x800000000\r
+#define BIT36 0x1000000000\r
+#define BIT37 0x2000000000\r
+#define BIT38 0x4000000000\r
+#define BIT39 0x8000000000\r
+#define BIT40 0x10000000000\r
+#define BIT41 0x20000000000\r
+#define BIT42 0x40000000000\r
+#define BIT43 0x80000000000\r
+#define BIT44 0x100000000000\r
+#define BIT45 0x200000000000\r
+#define BIT46 0x400000000000\r
+#define BIT47 0x800000000000\r
+#define BIT48 0x1000000000000\r
+#define BIT49 0x2000000000000\r
+#define BIT50 0x4000000000000\r
+#define BIT51 0x8000000000000\r
+#define BIT52 0x10000000000000\r
+#define BIT53 0x20000000000000\r
+#define BIT54 0x40000000000000\r
+#define BIT55 0x80000000000000\r
+#define BIT56 0x100000000000000\r
+#define BIT57 0x200000000000000\r
+#define BIT58 0x400000000000000\r
+#define BIT59 0x800000000000000\r
+#define BIT60 0x1000000000000000\r
+#define BIT61 0x2000000000000000\r
+#define BIT62 0x4000000000000000\r
+#define BIT63 0x8000000000000000\r
+#endif\r
+///\r
+/// The default PCH PCI bus number\r
+///\r
+#define DEFAULT_PCI_BUS_NUMBER_PCH 0\r
+\r
+///\r
+/// Default Vendor ID and Subsystem ID\r
+///\r
+#define V_PCH_INTEL_VENDOR_ID 0x8086\r
+#define V_PCH_DEFAULT_SID 0x7270\r
+#define V_PCH_DEFAULT_SVID_SID (V_PCH_INTEL_VENDOR_ID + (V_PCH_DEFAULT_SID << 16))\r
+\r
+///\r
+/// Include device register definitions\r
+///\r
+#include "PchRegs/PchRegsHda.h"\r
+#include "PchRegs/PchRegsLpss.h"\r
+#include "PchRegs/PchRegsPcie.h"\r
+#include "PchRegs/PchRegsPcu.h"\r
+#include "PchRegs/PchRegsRcrb.h"\r
+#include "PchRegs/PchRegsSata.h"\r
+#include "PchRegs/PchRegsScc.h"\r
+#include "PchRegs/PchRegsSmbus.h"\r
+#include "PchRegs/PchRegsSpi.h"\r
+#include "PchRegs/PchRegsUsb.h"\r
+//#include "PchRegs/PchRegsLpe.h"\r
+\r
+///\r
+/// Device IDS that are PCH Server specific\r
+///\r
+#define IS_PCH_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_LPC_DEVICE_ID_0) || \\r
+ (DeviceId == V_PCH_LPC_DEVICE_ID_1) || \\r
+ (DeviceId == V_PCH_LPC_DEVICE_ID_2) || \\r
+ (DeviceId == V_PCH_LPC_DEVICE_ID_3) \\r
+ )\r
+\r
+#define IS_PCH_VLV_LPC_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ IS_PCH_DEVICE_ID (DeviceId) \\r
+ )\r
+\r
+#define IS_PCH_VLV_SATA_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ IS_PCH_VLV_SATA_AHCI_DEVICE_ID (DeviceId) || \\r
+ IS_PCH_VLV_SATA_MODE_DEVICE_ID (DeviceId) || \\r
+ IS_PCH_VLV_SATA_RAID_DEVICE_ID (DeviceId) \\r
+ )\r
+\r
+#define IS_PCH_VLV_SATA_AHCI_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_D_AHCI) || \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_M_AHCI) \\r
+ )\r
+\r
+#define IS_PCH_VLV_SATA_RAID_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_D_RAID) || \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_M_RAID) \\r
+ )\r
+\r
+#define IS_PCH_VLV_SATA_MODE_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_D_IDE) || \\r
+ (DeviceId == V_PCH_SATA_DEVICE_ID_M_IDE) \\r
+ )\r
+#define IS_PCH_VLV_USB_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_USB_DEVICE_ID_0) || \\r
+ (DeviceId == V_PCH_USB_DEVICE_ID_1) \\r
+ )\r
+#define IS_PCH_VLV_PCIE_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_0) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_1) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_2) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_3) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_4) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_5) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_6) || \\r
+ (DeviceId == V_PCH_PCIE_DEVICE_ID_7) \\r
+ )\r
+\r
+///\r
+/// Any device ID that is Valleyview SC\r
+///\r
+#define IS_PCH_VLV_DEVICE_ID(DeviceId) \\r
+ ( \\r
+ IS_PCH_VLV_LPC_DEVICE_ID (DeviceId) || \\r
+ IS_PCH_VLV_SATA_DEVICE_ID (DeviceId) || \\r
+ IS_PCH_VLV_USB_DEVICE_ID (DeviceId) || \\r
+ IS_PCH_VLV_PCIE_DEVICE_ID (DeviceId) || \\r
+ (DeviceId) == V_PCH_SMBUS_DEVICE_ID || \\r
+ (DeviceId) == V_PCH_HDA_DEVICE_ID_0 || \\r
+ (DeviceId) == V_PCH_HDA_DEVICE_ID_1 \\r
+ )\r
+\r
+#define IS_SUPPORTED_DEVICE_ID(DeviceId) IS_PCH_VLV_DEVICE_ID (DeviceId)\r
+\r
+#endif\r
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