--- /dev/null
+/*++\r
+\r
+Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
+\r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution.\r
+ The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+\r
+--*/\r
+\r
+\r
+/*++\r
+Module Name:\r
+\r
+ SdHostIo.h\r
+\r
+Abstract:\r
+\r
+ Interface definition for EFI_SD_HOST_IO_PROTOCOL\r
+\r
+--*/\r
+\r
+#ifndef _SD_HOST_IO_H\r
+#define _SD_HOST_IO_H\r
+\r
+\r
+// Global ID for the EFI_SD_HOST_IO_PROTOCOL\r
+// {B63F8EC7-A9C9-4472-A4C0-4D8BF365CC51}\r
+//\r
+#define EFI_SD_HOST_IO_PROTOCOL_GUID \\r
+ { 0xb63f8ec7, 0xa9c9, 0x4472, { 0xa4, 0xc0, 0x4d, 0x8b, 0xf3, 0x65, 0xcc, 0x51 } }\r
+\r
+typedef struct _EFI_SD_HOST_IO_PROTOCOL EFI_SD_HOST_IO_PROTOCOL;\r
+\r
+//\r
+// TODO: Move to Pci22.h\r
+//\r
+#define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05\r
+#define PCI_IF_STANDARD_HOST_NO_DMA 0x00\r
+#define PCI_IF_STANDARD_HOST_SUPPORT_DMA 0x01\r
+\r
+//\r
+// TODO: Retire\r
+//\r
+#define EFI_SD_HOST_IO_PROTOCOL_REVISION_01 0x01\r
+\r
+//\r
+// TODO: Do these belong in an Industry Standard include file?\r
+//\r
+// MMIO Registers definition for MMC/SDIO controller\r
+//\r
+#define MMIO_DMAADR 0x00\r
+#define MMIO_BLKSZ 0x04\r
+#define MMIO_BLKCNT 0x06\r
+#define MMIO_CMDARG 0x08\r
+#define MMIO_XFRMODE 0x0C\r
+#define MMIO_SDCMD 0x0E\r
+#define MMIO_RESP 0x10\r
+#define MMIO_BUFDATA 0x20\r
+#define MMIO_PSTATE 0x24\r
+#define MMIO_HOSTCTL 0x28\r
+#define MMIO_PWRCTL 0x29\r
+#define MMIO_BLKGAPCTL 0x2A\r
+#define MMIO_WAKECTL 0x2B\r
+#define MMIO_CLKCTL 0x2C\r
+#define MMIO_TOCTL 0x2E\r
+#define MMIO_SWRST 0x2F\r
+#define MMIO_NINTSTS 0x30\r
+#define MMIO_ERINTSTS 0x32\r
+#define MMIO_NINTEN 0x34\r
+#define MMIO_ERINTEN 0x36\r
+#define MMIO_NINTSIGEN 0x38\r
+#define MMIO_ERINTSIGEN 0x3A\r
+#define MMIO_AC12ERRSTS 0x3C\r
+#define MMIO_HOST_CTL2 0x3E //hphang <- New in VLV2\r
+#define MMIO_CAP 0x40\r
+#define MMIO_CAP2 0x44 //hphang <- New in VLV2\r
+#define MMIO_MCCAP 0x48\r
+#define MMIO_FORCEEVENTCMD12ERRSTAT 0x50 //hphang <- New in VLV2\r
+#define MMIO_FORCEEVENTERRINTSTAT 0x52 //hphang <- New in VLV2\r
+#define MMIO_ADMAERRSTAT 0x54 //hphang <- New in VLV2\r
+#define MMIO_ADMASYSADDR 0x58 //hphang <- New in VLV2\r
+#define MMIO_PRESETVALUE0 0x60 //hphang <- New in VLV2\r
+#define MMIO_PRESETVALUE1 0x64 //hphang <- New in VLV2\r
+#define MMIO_PRESETVALUE2 0x68 //hphang <- New in VLV2\r
+#define MMIO_PRESETVALUE3 0x6C //hphang <- New in VLV2\r
+#define MMIO_BOOTTIMEOUTCTRL 0x70 //hphang <- New in VLV2\r
+#define MMIO_DEBUGSEL 0x74 //hphang <- New in VLV2\r
+#define MMIO_SHAREDBUS 0xE0 //hphang <- New in VLV2\r
+#define MMIO_SPIINTSUP 0xF0 //hphang <- New in VLV2\r
+#define MMIO_SLTINTSTS 0xFC\r
+#define MMIO_CTRLRVER 0xFE\r
+\r
+typedef enum {\r
+ ResponseNo = 0,\r
+ ResponseR1,\r
+ ResponseR1b,\r
+ ResponseR2,\r
+ ResponseR3,\r
+ ResponseR4,\r
+ ResponseR5,\r
+ ResponseR5b,\r
+ ResponseR6,\r
+ ResponseR7\r
+} RESPONSE_TYPE;\r
+\r
+typedef enum {\r
+ NoData = 0,\r
+ InData,\r
+ OutData\r
+} TRANSFER_TYPE;\r
+\r
+typedef enum {\r
+ Reset_Auto = 0,\r
+ Reset_DAT,\r
+ Reset_CMD,\r
+ Reset_DAT_CMD,\r
+ Reset_All,\r
+ Reset_HW\r
+} RESET_TYPE;\r
+\r
+\r
+typedef enum {\r
+ SDMA = 0,\r
+ ADMA2,\r
+ PIO\r
+} DMA_MOD;\r
+\r
+typedef struct {\r
+ UINT32 HighSpeedSupport: 1; //High speed supported\r
+ UINT32 V18Support: 1; //1.8V supported\r
+ UINT32 V30Support: 1; //3.0V supported\r
+ UINT32 V33Support: 1; //3.3V supported\r
+ UINT32 SDR50Support: 1;\r
+ UINT32 SDR104Support: 1;\r
+ UINT32 DDR50Support: 1;\r
+ UINT32 Reserved0: 1;\r
+ UINT32 BusWidth4: 1; // 4 bit width\r
+ UINT32 BusWidth8: 1; // 8 bit width\r
+ UINT32 Reserved1: 6;\r
+ UINT32 SDMASupport: 1;\r
+ UINT32 ADMA2Support: 1;\r
+ UINT32 DmaMode: 2;\r
+ UINT32 ReTuneTimer: 4;\r
+ UINT32 ReTuneMode: 2;\r
+ UINT32 Reserved2: 6;\r
+ UINT32 BoundarySize;\r
+} HOST_CAPABILITY;\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ The main function used to send the command to the card inserted into the SD host\r
+ slot.\r
+ It will assemble the arguments to set the command register and wait for the command\r
+ and transfer completed until timeout. Then it will read the response register to fill\r
+ the ResponseData\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ CommandIndex - The command index to set the command index field of command register\r
+ Argument - Command argument to set the argument field of command register\r
+ DataType - TRANSFER_TYPE, indicates no data, data in or data out\r
+ Buffer - Contains the data read from / write to the device\r
+ BufferSize - The size of the buffer\r
+ ResponseType - RESPONSE_TYPE\r
+ TimeOut - Time out value in 1 ms unit\r
+ ResponseData - Depending on the ResponseType, such as CSD or card status\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_INVALID_PARAMETER\r
+ EFI_OUT_OF_RESOURCES\r
+ EFI_TIMEOUT\r
+ EFI_DEVICE_ERROR\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT16 CommandIndex,\r
+ IN UINT32 Argument,\r
+ IN TRANSFER_TYPE DataType,\r
+ IN UINT8 *Buffer, OPTIONAL\r
+ IN UINT32 BufferSize,\r
+ IN RESPONSE_TYPE ResponseType,\r
+ IN UINT32 TimeOut,\r
+ OUT UINT32 *ResponseData OPTIONAL\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set max clock frequency of the host, the actual frequency\r
+ may not be the same as MaxFrequency. It depends on\r
+ the max frequency the host can support, divider, and host\r
+ speed mode.\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ MaxFrequency - Max frequency in HZ\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_TIMEOUT\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 MaxFrequency\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set bus width of the host\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ BusWidth - Bus width in 1, 4, 8 bits\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_INVALID_PARAMETER\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 BusWidth\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set voltage which could supported by the host.\r
+ Support 0(Power off the host), 1.8V, 3.0V, 3.3V\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ Voltage - Units in 0.1 V\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_INVALID_PARAMETER\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 Voltage\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set Host High Speed\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ HighSpeed - True for High Speed Mode set, false for normal mode\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_INVALID_PARAMETER\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 HighSpeed\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set High Speed Mode\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ SetHostDdrMode - True for DDR Mode set, false for normal mode\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_INVALID_PARAMETER\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 DdrMode\r
+ );\r
+\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Reset the host\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ ResetAll - TRUE to reset all\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_TIMEOUT\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN RESET_TYPE ResetType\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Reset the host\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ Enable - TRUE to enable, FALSE to disable\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_TIMEOUT\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN BOOLEAN Enable\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Find whether these is a card inserted into the slot. If so\r
+ init the host. If not, return EFI_NOT_FOUND.\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_NOT_FOUND\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This\r
+ );\r
+\r
+/*++\r
+\r
+ Routine Description:\r
+ Set the Block length\r
+\r
+ Arguments:\r
+ This - Pointer to EFI_SD_HOST_IO_PROTOCOL\r
+ BlockLength - card supportes block length\r
+\r
+ Returns:\r
+ EFI_SUCCESS\r
+ EFI_TIMEOUT\r
+\r
+--*/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH) (\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This,\r
+ IN UINT32 BlockLength\r
+ );\r
+\r
+typedef EFI_STATUS\r
+(EFIAPI *EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE)(\r
+ IN EFI_SD_HOST_IO_PROTOCOL *This\r
+ );\r
+\r
+\r
+\r
+//\r
+// Interface structure for the EFI SD Host I/O Protocol\r
+//\r
+struct _EFI_SD_HOST_IO_PROTOCOL {\r
+ UINT32 Revision;\r
+ HOST_CAPABILITY HostCapability;\r
+ EFI_SD_HOST_IO_PROTOCOL_SEND_COMMAND SendCommand;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_CLOCK_FREQUENCY SetClockFrequency;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_BUS_WIDTH SetBusWidth;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_HOST_VOLTAGE SetHostVoltage;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_HOST_DDR_MODE SetHostDdrMode;\r
+ EFI_SD_HOST_IO_PROTOCOL_RESET_SD_HOST ResetSdHost;\r
+ EFI_SD_HOST_IO_PROTOCOL_ENABLE_AUTO_STOP_CMD EnableAutoStopCmd;\r
+ EFI_SD_HOST_IO_PROTOCOL_DETECT_CARD_AND_INIT_HOST DetectCardAndInitHost;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_BLOCK_LENGTH SetBlockLength;\r
+ EFI_SD_HOST_IO_PROTOCOL_SETUP_DEVICE SetupDevice;\r
+ EFI_SD_HOST_IO_PROTOCOL_SET_HOST_SPEED_MODE SetHostSpeedMode;\r
+};\r
+\r
+extern EFI_GUID gEfiSdHostIoProtocolGuid;\r
+\r
+#endif\r
+\r
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