+++ /dev/null
-/*++\r
-\r
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
- \r\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
- \r\r
-\r
-Module Name:\r
-\r
- PciPlatform.h\r
-\r
-Abstract:\r
-\r
---*/\r
-#ifndef PCI_PLATFORM_H_\r
-#define PCI_PLATFORM_H_\r
-\r
-\r
-#include <PiDxe.h>\r
-#include "Platform.h"\r
-\r
-//\r
-// Produced Protocols\r
-//\r
-#include <Protocol/PciPlatform.h>\r
-\r
-#define IGD_DID_II 0x0BE1\r
-#define IGD_DID_0BE4 0x0BE4\r
-#define IGD_DID_VLV_A0 0x0F31\r
-#define OPROM_DID_OFFSET 0x46\r
-\r
-typedef struct {\r
- EFI_GUID FileName;\r
- UINTN Segment;\r
- UINTN Bus;\r
- UINTN Device;\r
- UINTN Function;\r
- UINT16 VendorId;\r
- UINT16 DeviceId;\r
- UINT8 Flag;\r
-} PCI_OPTION_ROM_TABLE;\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-PhaseNotify (\r
- IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
- IN EFI_HANDLE HostBridge,\r
- IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r
- IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
- );\r
-\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-PlatformPrepController (\r
- IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
- IN EFI_HANDLE HostBridge,\r
- IN EFI_HANDLE RootBridge,\r
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
- IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r
- IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI \r
-GetPlatformPolicy (\r
- IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
- OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-GetPciRom (\r
- IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- OUT VOID **RomImage,\r
- OUT UINTN *RomSize\r
- );\r
-\r
-#endif\r
-\r
-\r