X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FDrivers%2FCpuDxe%2FAArch64%2FMmu.c;h=3e216c7cb235165b3df686aabff58628dd4ab801;hp=95bf10bcb2b0502b8c83266d3a9fc64f1552dbad;hb=bdecff6c0f23027c643cce70ae2004420dc81324;hpb=012737243077fa9a843917878a5a9bdd343f611c

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 95bf10bcb2..3e216c7cb2 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -3,6 +3,7 @@
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
 Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -32,9 +33,8 @@ GetFirstPageAttribute (
   // Get the first entry of the table
   FirstEntry = *FirstLevelTableAddress;
 
-  if ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
+  if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
     // Only valid for Levels 0, 1 and 2
-    ASSERT (TableLevel < 3);
 
     // Get the attribute of the subsequent table
     return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
@@ -204,28 +204,30 @@ EfiAttributeToArmAttribute (
 
   switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
   case EFI_MEMORY_UC:
-    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
+    if (ArmReadCurrentEL () == AARCH64_EL2) {
+      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
+    } else {
+      ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
+    }
     break;
   case EFI_MEMORY_WC:
     ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
     break;
   case EFI_MEMORY_WT:
-    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;
+    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
     break;
   case EFI_MEMORY_WB:
-    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;
+    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
     break;
   default:
-    DEBUG ((EFI_D_ERROR, "EfiAttributeToArmAttribute: 0x%lX attributes is not supported.\n", EfiAttributes));
-    ASSERT (0);
-    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
+    ArmAttributes = TT_ATTR_INDX_MASK;
   }
 
   // Set the access flag to match the block attributes
   ArmAttributes |= TT_AF;
 
   // Determine protection attributes
-  if (EfiAttributes & EFI_MEMORY_WP) {
+  if (EfiAttributes & EFI_MEMORY_RO) {
     ArmAttributes |= TT_AP_RO_RO;
   }
 
@@ -280,6 +282,9 @@ GetMemoryRegionRec (
     if (!EFI_ERROR(Status)) {
       return EFI_SUCCESS;
     }
+
+    // Now we processed the table move to the next entry
+    BlockEntry++;
   } else if (EntryType == BlockEntryType) {
     // We have found the BlockEntry attached to the address. We save its start address (the start
     // address might be before the 'BaseAdress') and attributes