X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FDrivers%2FCpuDxe%2FCpuDxe.c;fp=ArmPkg%2FDrivers%2FCpuDxe%2FCpuDxe.c;h=62a6e2d620a6c58c0f129601320d5eec5f36a6fc;hp=082ef30fb6c40b063f48523839087a3f5dcb2bae;hb=429309e0c6b74792d679681a8edd0d5ae0ff850c;hpb=7c2a6033c149625482a18cd51b65513c8fb8fe15 diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c index 082ef30fb6..62a6e2d620 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c +++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c @@ -11,7 +11,7 @@ #include -BOOLEAN mIsFlushingGCD; +BOOLEAN mIsFlushingGCD; /** This function flushes the range of addresses from Start to Start+Length @@ -43,13 +43,12 @@ BOOLEAN mIsFlushingGCD; EFI_STATUS EFIAPI CpuFlushCpuDataCache ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS Start, - IN UINT64 Length, - IN EFI_CPU_FLUSH_TYPE FlushType + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_PHYSICAL_ADDRESS Start, + IN UINT64 Length, + IN EFI_CPU_FLUSH_TYPE FlushType ) { - switch (FlushType) { case EfiCpuFlushTypeWriteBack: WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length); @@ -67,7 +66,6 @@ CpuFlushCpuDataCache ( return EFI_SUCCESS; } - /** This function enables interrupt processing by the processor. @@ -80,7 +78,7 @@ CpuFlushCpuDataCache ( EFI_STATUS EFIAPI CpuEnableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This + IN EFI_CPU_ARCH_PROTOCOL *This ) { ArmEnableInterrupts (); @@ -88,7 +86,6 @@ CpuEnableInterrupt ( return EFI_SUCCESS; } - /** This function disables interrupt processing by the processor. @@ -101,7 +98,7 @@ CpuEnableInterrupt ( EFI_STATUS EFIAPI CpuDisableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This + IN EFI_CPU_ARCH_PROTOCOL *This ) { ArmDisableInterrupts (); @@ -109,7 +106,6 @@ CpuDisableInterrupt ( return EFI_SUCCESS; } - /** This function retrieves the processor's current interrupt state a returns it in State. If interrupts are currently enabled, then TRUE is returned. If interrupts @@ -126,19 +122,18 @@ CpuDisableInterrupt ( EFI_STATUS EFIAPI CpuGetInterruptState ( - IN EFI_CPU_ARCH_PROTOCOL *This, - OUT BOOLEAN *State + IN EFI_CPU_ARCH_PROTOCOL *This, + OUT BOOLEAN *State ) { if (State == NULL) { return EFI_INVALID_PARAMETER; } - *State = ArmGetInterruptState(); + *State = ArmGetInterruptState (); return EFI_SUCCESS; } - /** This function generates an INIT on the processor. If this function succeeds, then the processor will be reset, and control will not be returned to the caller. If InitType is @@ -158,8 +153,8 @@ CpuGetInterruptState ( EFI_STATUS EFIAPI CpuInit ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_CPU_INIT_TYPE InitType + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_CPU_INIT_TYPE InitType ) { return EFI_UNSUPPORTED; @@ -168,9 +163,9 @@ CpuInit ( EFI_STATUS EFIAPI CpuRegisterInterruptHandler ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler + IN EFI_CPU_ARCH_PROTOCOL *This, + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler ) { return RegisterInterruptHandler (InterruptType, InterruptHandler); @@ -179,10 +174,10 @@ CpuRegisterInterruptHandler ( EFI_STATUS EFIAPI CpuGetTimerValue ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN UINT32 TimerIndex, - OUT UINT64 *TimerValue, - OUT UINT64 *TimerPeriod OPTIONAL + IN EFI_CPU_ARCH_PROTOCOL *This, + IN UINT32 TimerIndex, + OUT UINT64 *TimerValue, + OUT UINT64 *TimerPeriod OPTIONAL ) { return EFI_UNSUPPORTED; @@ -199,8 +194,8 @@ CpuGetTimerValue ( VOID EFIAPI IdleLoopEventCallback ( - IN EFI_EVENT Event, - IN VOID *Context + IN EFI_EVENT Event, + IN VOID *Context ) { CpuSleep (); @@ -209,8 +204,8 @@ IdleLoopEventCallback ( // // Globals used to initialize the protocol // -EFI_HANDLE mCpuHandle = NULL; -EFI_CPU_ARCH_PROTOCOL mCpu = { +EFI_HANDLE mCpuHandle = NULL; +EFI_CPU_ARCH_PROTOCOL mCpu = { CpuFlushCpuDataCache, CpuEnableInterrupt, CpuDisableInterrupt, @@ -226,7 +221,7 @@ EFI_CPU_ARCH_PROTOCOL mCpu = { STATIC VOID InitializeDma ( - IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol + IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol ) { CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule (); @@ -234,22 +229,23 @@ InitializeDma ( EFI_STATUS CpuDxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable ) { EFI_STATUS Status; - EFI_EVENT IdleLoopEvent; + EFI_EVENT IdleLoopEvent; InitializeExceptions (&mCpu); InitializeDma (&mCpu); Status = gBS->InstallMultipleProtocolInterfaces ( - &mCpuHandle, - &gEfiCpuArchProtocolGuid, &mCpu, - NULL - ); + &mCpuHandle, + &gEfiCpuArchProtocolGuid, + &mCpu, + NULL + ); // // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes () @@ -262,8 +258,8 @@ CpuDxeInitialize ( // If the platform is a MPCore system then install the Configuration Table describing the // secondary core states - if (ArmIsMpCore()) { - PublishArmProcessorTable(); + if (ArmIsMpCore ()) { + PublishArmProcessorTable (); } //