X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FDrivers%2FPL390Gic%2FPL390GicSec.c;h=156e0601e8770e9ef08a37fc3d76f6ddf47e18fd;hp=7bb0f3dd6f37e92f4cb637a1a27aaaacc36cd613;hb=2ac288f9199196dfc4ab05bee0a7815ca361174a;hpb=58b5d037b4627460242c9333860faabf6115069e

diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 7bb0f3dd6f..156e0601e8 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -34,11 +34,11 @@ PL390GicSetupNonSecure (
    //Check if there are any pending interrupts
    while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF))
    {
-\s\s   //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
-\s\s   UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
+     //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
+     UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
 
-\s\s   //Write to End of interrupt signal
-\s\s   MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+     //Write to End of interrupt signal
+     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
    }
 
   // Ensure all GIC interrupts are Non-Secure
@@ -56,19 +56,19 @@ PL390GicEnableInterruptInterface (
   IN  INTN          GicInterruptInterfaceBase
   )
 {
-\s\sMmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0x000000FF);  /* Set Priority Mask to allow interrupts */
+  MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0x000000FF);  /* Set Priority Mask to allow interrupts */
 
-\s\s/*
-\s\s * Enable CPU interface in Secure world
+  /*
+   * Enable CPU interface in Secure world
      * Enable CPU inteface in Non-secure World
-\s\s * Signal Secure Interrupts to CPU using FIQ line *
-\s\s */
+   * Signal Secure Interrupts to CPU using FIQ line *
+   */
     MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,
-    \s\s\s\sGIC_ICCICR_ENABLE_SECURE(1) |
-    \s\s\s\sGIC_ICCICR_ENABLE_NS(1) |
-    \s\s\s\sGIC_ICCICR_ACK_CTL(0) |
-    \s\s\s\sGIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |
-    \s\s\s\sGIC_ICCICR_USE_SBPR(0));
+        GIC_ICCICR_ENABLE_SECURE(1) |
+        GIC_ICCICR_ENABLE_NS(1) |
+        GIC_ICCICR_ACK_CTL(0) |
+        GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |
+        GIC_ICCICR_USE_SBPR(0));
 }
 
 VOID
@@ -88,7 +88,7 @@ PL390GicSendSgiTo (
   IN  INTN          CPUTargetList
   )
 {
-\s\sMmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
+  MmioWrite32(GicDistributorBase + GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
 }
 
 UINT32
@@ -103,9 +103,9 @@ PL390GicAcknowledgeSgiFrom (
     InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
 
     //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
-\s\sif (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
-\s\s    //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
-\s\s\s\sMmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+  if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
+      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
         return 1;
     } else {
         return 0;
@@ -125,9 +125,9 @@ PL390GicAcknowledgeSgi2From (
     InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
 
     //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
-\s\sif((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
-\s\s    //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
-\s\s\s\sMmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+  if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
+      //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+    MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
         return 1;
     } else {
         return 0;