X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FLibrary%2FArmCacheMaintenanceLib%2FArmCacheMaintenanceLib.c;h=bad5d244cbbadc8a96938f48c048dcb13143e26e;hp=0dd453003c577409052d2cfd8da3da724dd305c5;hb=HEAD;hpb=d60f6af456a08f186a2b7568eec5279e96547a22
diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index 0dd453003c..bad5d244cb 100644
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -1,125 +1,148 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#include
-#include
-#include
-
-VOID
-CacheRangeOperation (
- IN VOID *Start,
- IN UINTN Length,
- IN CACHE_OPERATION CacheOperation,
- IN LINE_OPERATION LineOperation
- )
-{
- UINTN ArmCacheLineLength = ArmDataCacheLineLength();
- UINTN ArmCacheLineAlignmentMask = ArmCacheLineLength - 1;
- UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);
-
- if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {
- CacheOperation ();
- } else {
- // Align address (rounding down)
- UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
- UINTN EndAddress = (UINTN)Start + Length;
-
- // Perform the line operation on an address in each cache line
- while (AlignedAddress < EndAddress) {
- LineOperation(AlignedAddress);
- AlignedAddress += ArmCacheLineLength;
- }
- }
-}
-
-VOID
-EFIAPI
-InvalidateInstructionCache (
- VOID
- )
-{
- ArmCleanDataCache();
- ArmInvalidateInstructionCache();
-}
-
-VOID
-EFIAPI
-InvalidateDataCache (
- VOID
- )
-{
- ArmInvalidateDataCache();
-}
-
-VOID *
-EFIAPI
-InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation (Address, Length, ArmCleanDataCacheToPoU, ArmCleanDataCacheEntryByMVA);
- ArmInvalidateInstructionCache ();
- return Address;
-}
-
-VOID
-EFIAPI
-WriteBackInvalidateDataCache (
- VOID
- )
-{
- ArmCleanInvalidateDataCache();
-}
-
-VOID *
-EFIAPI
-WriteBackInvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);
- return Address;
-}
-
-VOID
-EFIAPI
-WriteBackDataCache (
- VOID
- )
-{
- ArmCleanDataCache();
-}
-
-VOID *
-EFIAPI
-WriteBackDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);
- return Address;
-}
-
-VOID *
-EFIAPI
-InvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);
- return Address;
-}
+/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include
+#include
+#include
+#include
+
+STATIC
+VOID
+CacheRangeOperation (
+ IN VOID *Start,
+ IN UINTN Length,
+ IN LINE_OPERATION LineOperation,
+ IN UINTN LineLength
+ )
+{
+ UINTN ArmCacheLineAlignmentMask;
+ // Align address (rounding down)
+ UINTN AlignedAddress;
+ UINTN EndAddress;
+
+ ArmCacheLineAlignmentMask = LineLength - 1;
+ AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
+ EndAddress = (UINTN)Start + Length;
+
+ // Perform the line operation on an address in each cache line
+ while (AlignedAddress < EndAddress) {
+ LineOperation (AlignedAddress);
+ AlignedAddress += LineLength;
+ }
+
+ ArmDataSynchronizationBarrier ();
+}
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation (
+ Address,
+ Length,
+ ArmCleanDataCacheEntryToPoUByMVA,
+ ArmDataCacheLineLength ()
+ );
+ CacheRangeOperation (
+ Address,
+ Length,
+ ArmInvalidateInstructionCacheEntryToPoUByMVA,
+ ArmInstructionCacheLineLength ()
+ );
+
+ ArmInstructionSynchronizationBarrier ();
+
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation (
+ Address,
+ Length,
+ ArmCleanInvalidateDataCacheEntryByMVA,
+ ArmDataCacheLineLength ()
+ );
+ return Address;
+}
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation (
+ Address,
+ Length,
+ ArmCleanDataCacheEntryByMVA,
+ ArmDataCacheLineLength ()
+ );
+ return Address;
+}
+
+VOID *
+EFIAPI
+InvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ )
+{
+ CacheRangeOperation (
+ Address,
+ Length,
+ ArmInvalidateDataCacheEntryByMVA,
+ ArmDataCacheLineLength ()
+ );
+ return Address;
+}