X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FLibrary%2FArmLib%2FArmV7%2FArmV7Mmu.c;h=f57e48b3a5ad32c42de0a73e4caad65dbecff2c6;hp=3ba66d62bfdc605ea04d529f7ff0c8a44d078c35;hb=bd6b97994ab6219c74033a7e68a503dbb8d56f9f;hpb=12c5ae238ed1f6fcf2c29fa38d5ff77b15da12c9;ds=sidebyside

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 3ba66d62bf..f57e48b3a5 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -29,7 +29,8 @@ PopulateLevel2PageTable (
   IN UINT32                         PhysicalBase,
   IN UINT32                         RemainLength,
   IN ARM_MEMORY_REGION_ATTRIBUTES   Attributes
-  ) {
+  )
+{
   UINT32* PageEntry;
   UINT32  Pages;
   UINT32  Index;
@@ -173,14 +174,14 @@ FillTranslationTable (
         PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
       } else {
         // Case: Physical address aligned on the Section Size (1MB) && the length does not fill a section
-        PopulateLevel2PageTable(SectionEntry++,PhysicalBase,RemainLength,MemoryRegion->Attributes);
+        PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);
 
         // It must be the last entry
         break;
       }
     } else {
       // Case: Physical address NOT aligned on the Section Size (1MB)
-      PopulateLevel2PageTable(SectionEntry++,PhysicalBase,RemainLength,MemoryRegion->Attributes);
+      PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);
       // Aligned the address
       PhysicalBase = (PhysicalBase + TT_DESCRIPTOR_SECTION_SIZE) & ~(TT_DESCRIPTOR_SECTION_SIZE-1);
 
@@ -206,7 +207,7 @@ ArmConfigureMmu (
   UINT32                        TTBRAttributes;
 
   // Allocate pages for translation table.
-  TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
+  TranslationTable = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));
   TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK;
 
   if (TranslationTableBase != NULL) {
@@ -219,17 +220,17 @@ ArmConfigureMmu (
 
   ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);
 
-  ArmCleanInvalidateDataCache();
-  ArmInvalidateInstructionCache();
-  ArmInvalidateTlb();
+  ArmCleanInvalidateDataCache ();
+  ArmInvalidateInstructionCache ();
+  ArmInvalidateTlb ();
 
-  ArmDisableDataCache();
+  ArmDisableDataCache ();
   ArmDisableInstructionCache();
-  ArmDisableMmu();
+  ArmDisableMmu ();
 
   // Make sure nothing sneaked into the cache
-  ArmCleanInvalidateDataCache();
-  ArmInvalidateInstructionCache();
+  ArmCleanInvalidateDataCache ();
+  ArmInvalidateInstructionCache ();
 
   TranslationTableAttribute = (ARM_MEMORY_REGION_ATTRIBUTES)0;
   while (MemoryTable->Length != 0) {