X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPkg%2FLibrary%2FDebugAgentSymbolsBaseLib%2FArm%2FDebugAgentException.S;h=21518146080359b1a9b0c966d9373beb8ee270c3;hp=0566a89e2c9080177faec4f3cc8c922d20d9a7b0;hb=5072c47411b81bd8ce66ccb46099128ca1fd5575;hpb=3402aac7d985bf8a9f9d3c639f3fe93609380513

diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
index 0566a89e2c..2151814608 100644
--- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
+++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S
@@ -54,6 +54,7 @@ GCC_ASM_EXPORT(DebugAgentVectorTable)
 GCC_ASM_IMPORT(DefaultExceptionHandler)
 
 .text
+.syntax unified
 #if !defined(__APPLE__)
 .fpu neon    @ makes vpush/vpop assemble
 #endif
@@ -202,15 +203,15 @@ ASM_PFX(AsmCommonExceptionEntry):
   and       R3, R1, #0x1f           @ Check CPSR to see if User or System Mode
   cmp       R3, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1df))
   cmpne     R3, #0x10               @
-  stmeqed   R2, {lr}^               @   save unbanked lr
+  stmdaeq   R2, {lr}^               @   save unbanked lr
                                     @ else
-  stmneed   R2, {lr}                @   save SVC lr
+  stmdane   R2, {lr}                @   save SVC lr
 
 
   ldr       R5, [SP, #0x58]         @ PC is the LR pushed by srsfd
                                     @ Check to see if we have to adjust for Thumb entry
   sub       r4, r0, #1              @ if (ExceptionType == 1 || ExceptionType ==2)) {
-  cmp       r4, #1                  @   // UND & SVC have differnt LR adjust for Thumb
+  cmp       r4, #1                  @   // UND & SVC have different LR adjust for Thumb
   bhi       NoAdjustNeeded
 
   tst       r1, #0x20               @   if ((CPSR & T)) == T) {  // Thumb Mode on entry
@@ -263,9 +264,9 @@ DefaultExceptionHandler (
   and       R1, R1, #0x1f           @ Check to see if User or System Mode
   cmp       R1, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1f))
   cmpne     R1, #0x10               @
-  ldmeqed   R2, {lr}^               @   restore unbanked lr
+  ldmibeq   R2, {lr}^               @   restore unbanked lr
                                     @ else
-  ldmneed   R3, {lr}                @   restore SVC lr, via ldmfd SP!, {LR}
+  ldmibne   R3, {lr}                @   restore SVC lr, via ldmfd SP!, {LR}
 
   ldmfd     SP!,{R0-R12}            @ Restore general purpose registers
                                     @ Exception handler can not change SP