X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPlatformPkg%2FArmPlatformPkg.dec;h=b33b6e630d851e8386e09a30f1fd41a6105c105b;hp=9240efa2f63abebd97188356cb7a330591f23f35;hb=99cfb43aa6bef761d588b3192f8402a484bb5354;hpb=964680c124d0826c8e08b4c59cc4193e9a912ea1 diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec index 9240efa2f6..b33b6e630d 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -1,63 +1,146 @@ -#/** @file -# Arm Versatile Express package. -# -# Copyright (c) 2011, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - DEC_SPECIFICATION = 0x00010005 - PACKAGE_NAME = ArmPlatformPkg - PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b - PACKAGE_VERSION = 0.1 - -################################################################################ -# -# Include Section - list of Include Paths that are provided by this package. -# Comments are used for Keywords and Module Types. -# -# Supported Module Types: -# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION -# -################################################################################ -[Includes.common] - Include # Root include for the package - -[Guids.common] - gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } } - -[PcdsFeatureFlag.common] - gArmPlatformTokenSpaceGuid.PcdStandalone|FALSE|BOOLEAN|0x00000001 - -[PcdsFixedAtBuild.common] - # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file. - # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor. - gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000002 - - gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0|UINT32|0x00000003 - - # Stack for CPU Cores in Secure Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000004 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0|UINT32|0x00000005 - - # Stack for CPU Cores in Secure Monitor Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000006 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0|UINT32|0x00000007 - - # Stack for CPU Cores in Non Secure Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0|UINT32|0x00000008 - gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0|UINT32|0x00000009 - - # Size of the region used by UEFI in permanent memory (Reserved 128MB by default) - gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015 - - # Size of the region reserved for fixed address allocations (Reserved 128MB by default) - gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize|0x08000000|UINT32|0x00000014 +#/** @file +# +# Copyright (c) 2011-2017, ARM Limited. All rights reserved. +# Copyright (c) 2015, Intel Corporation. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + DEC_SPECIFICATION = 0x00010005 + PACKAGE_NAME = ArmPlatformPkg + PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] + Include # Root include for the package + +[LibraryClasses] + ArmPlatformLib|Include/Library/ArmPlatformLib.h + LcdHwLib|Include/Library/LcdHwLib.h + LcdPlatformLib|Include/Library/LcdPlatformLib.h + NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h + PL011UartLib|Include/Library/PL011UartLib.h + +[Guids.common] + gArmPlatformTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } } + # + # Following Guid must match FILE_GUID in MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + # + gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } } + + gArmBootMonFsFileInfoGuid = { 0x41e26b9c, 0xada6, 0x45b3, { 0x80, 0x8e, 0x23, 0x57, 0xa3, 0x5b, 0x60, 0xd6 } } + +[PcdsFeatureFlag.common] + # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0. + gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012 + + gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001 + gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004 + + gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C + + # Disable the GOP controller on ExitBootServices(). By default the value is FALSE, + # we assume the OS will handle the FrameBuffer from the UEFI GOP information. + gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D + + # Enable Legacy Linux support in the BDS + gArmPlatformTokenSpaceGuid.PcdBdsLinuxSupport|FALSE|BOOLEAN|0x0000002E + +[PcdsFixedAtBuild.common] + gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039 + gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038 + + # Stack for CPU Cores in Secure Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT64|0x00000005 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006 + + # Stack for CPU Cores in Non Secure Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A + + # Size of the region used by UEFI in permanent memory (Reserved 128MB by default) + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015 + + # Boot Monitor FileSystem + gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L""|VOID*|0x0000003A + + # + # ARM Primecells + # + + ## SP805 Watchdog + gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023 + gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021 + + ## PL011 UART + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F + gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020 + gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F + gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E + + ## PL011 Serial Debug UART + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032 + + ## PL061 GPIO + gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025 + + ## PL111 Lcd & HdLcd + gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026 + gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027 + + ## PL180 MCI + gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028 + gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029 + + # + # BDS - Boot Manager + # + gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"|VOID*|0x00000019 + gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Default Boot Device"|VOID*|0x0000000C + gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D + gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L""|VOID*|0x000000F + + gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B + gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C + +[PcdsFixedAtBuild.common,PcdsDynamic.common] + ## PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024 + gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022 + + gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033 + +[PcdsFixedAtBuild.ARM] + # Stack for CPU Cores in Secure Monitor Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT64|0x00000007 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008 + +[PcdsFixedAtBuild.AARCH64] + # The Secure World is only running in EL3. Only one set of stacks is needed for AArch64. + # The Secure stacks are described by PcdCPUCoresSecStackBase, PcdCPUCoreSecPrimaryStackSize + # and PcdCPUCoreSecSecondaryStackSize + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT64|0x00000007 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x0|UINT32|0x00000008 +