X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPlatformPkg%2FPrePeiCore%2FPrePeiCore.c;h=3a81e2e23f2c77b3c20e5244bd8d6d4557b0ec7b;hp=fdd8697edfffaa407458dc7e1c838dc441afc47e;hb=4960d8e00427d52c8db5da492ac7aff38cbc9d30;hpb=a9d7090fc217dad23330ddc54cad4d4987cab65a

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index fdd8697edf..3a81e2e23f 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -1,15 +1,15 @@
 /** @file
 *  Main file supporting the transition to PEI Core in Normal World for Versatile Express
 *
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
+*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
 *
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 *
 **/
 
@@ -17,23 +17,15 @@
 #include <Library/DebugAgentLib.h>
 #include <Library/ArmLib.h>
 
-#include <Ppi/ArmGlobalVariable.h>
-
 #include "PrePeiCore.h"
 
-EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };
-ARM_GLOBAL_VARIABLE_PPI             mGlobalVariablePpi = { PrePeiCoreGetGlobalVariableMemory };
+CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport };
 
-EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {
+CONST EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {
   {
     EFI_PEI_PPI_DESCRIPTOR_PPI,
     &gEfiTemporaryRamSupportPpiGuid,
-    &mTemporaryRamSupportPpi
-  },
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &gArmGlobalVariablePpiGuid,
-    &mGlobalVariablePpi
+    (VOID *) &mTemporaryRamSupportPpi
   }
 };
 
@@ -53,7 +45,7 @@ CreatePpiList (
   ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
 
   // Copy the Common and Platform PPis in Temporrary Memory
-  ListBase = PcdGet32 (PcdCPUCoresStackBase);
+  ListBase = PcdGet64 (PcdCPUCoresStackBase);
   CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
   CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);
 
@@ -71,14 +63,13 @@ CEntryPoint (
   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
   )
 {
-  //Clean Data cache
-  ArmCleanInvalidateDataCache ();
-
-  //Invalidate instruction cache
+  // Data Cache enabled on Primary core when MMU is enabled.
+  ArmDisableDataCache ();
+  // Invalidate Data cache
+  ArmInvalidateDataCache ();
+  // Invalidate instruction cache
   ArmInvalidateInstructionCache ();
-
-  // Enable Instruction & Data caches
-  ArmEnableDataCache ();
+  // Enable Instruction Caches on all cores.
   ArmEnableInstructionCache ();
 
   //
@@ -87,13 +78,15 @@ CEntryPoint (
   //
 
   // Write VBAR - The Exception Vector table must be aligned to its requirement
+  // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure
+  // 'Align=4K' is defined into your FDF for this module.
   ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);
   ArmWriteVBar ((UINTN)PeiVectorTable);
 
   //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.
 
   // If not primary Jump to Secondary Main
-  if (IS_PRIMARY_CORE(MpId)) {
+  if (ArmPlatformIsPrimaryCore (MpId)) {
     // Initialize the Debug Agent for Source Level Debugging
     InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
     SaveAndSetDebugTimerInterrupt (TRUE);
@@ -124,39 +117,27 @@ PrePeiCoreTemporaryRamSupport (
   VOID                             *NewHeap;
   VOID                             *OldStack;
   VOID                             *NewStack;
+  UINTN                            HeapSize;
+
+  HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT);
 
   OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
-  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize >> 1));
+  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize));
 
-  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + (CopySize >> 1));
+  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize);
   NewStack = (VOID*)(UINTN)PermanentMemoryBase;
 
   //
   // Migrate the temporary memory stack to permanent memory stack.
   //
-  CopyMem (NewStack, OldStack, CopySize >> 1);
+  CopyMem (NewStack, OldStack, CopySize - HeapSize);
 
   //
   // Migrate the temporary memory heap to permanent memory heap.
   //
-  CopyMem (NewHeap, OldHeap, CopySize >> 1);
-  
-  SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack);
+  CopyMem (NewHeap, OldHeap, HeapSize);
 
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PrePeiCoreGetGlobalVariableMemory (
-  OUT EFI_PHYSICAL_ADDRESS    *GlobalVariableBase
-  )
-{
-  ASSERT (GlobalVariableBase != NULL);
-
-  *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +
-                        (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
-                        (UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
+  SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack);
 
   return EFI_SUCCESS;
 }
-