X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPlatformPkg%2FPrePeiCore%2FPrePeiCore.c;h=56186471fa2f31a5822acf89090260bb6abc34a1;hp=f76a1b191fe5c53a756c0d123d4429d3465af2c0;hb=f598bf12660fc7e758710e6a484d7eea3bfee6ef;hpb=d6b5f236aeba4031fc9dabe553a1969e127771fe

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index f76a1b191f..56186471fa 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -13,29 +13,17 @@
 *
 **/
 
-#include <PiPei.h>
-#include <Ppi/TemporaryRamSupport.h>
 #include <Library/DebugLib.h>
 #include <Library/PcdLib.h>
 #include <Library/IoLib.h>
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/PrintLib.h>
 #include <Library/ArmLib.h>
+#include <Library/SerialPortLib.h>
 #include <Chipset/ArmV7.h>
 
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
-  IN CONST EFI_PEI_SERVICES   **PeiServices,
-  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
-  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
-  IN UINTN                    CopySize
-  );
-
-VOID
-SecSwitchStack (
-  INTN    StackDelta
-  );
+#include "PrePeiCore.h"
 
 EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
 
@@ -47,10 +35,6 @@ EFI_PEI_PPI_DESCRIPTOR      gSecPpiTable[] = {
   }
 };
 
-// Vector Table for Pei Phase
-VOID  PeiVectorTable (VOID);
-
-
 VOID
 CEntryPoint (
   IN  UINTN                     CoreId,
@@ -64,8 +48,8 @@ CEntryPoint (
   ArmInvalidateInstructionCache();
 
   // Enable Instruction & Data caches
-  ArmEnableDataCache();
-  ArmEnableInstructionCache();
+  ArmEnableDataCache ();
+  ArmEnableInstructionCache ();
 
   //
   // Note: Doesn't have to Enable CPU interface in non-secure world,
@@ -81,9 +65,9 @@ CEntryPoint (
   //If not primary Jump to Secondary Main
   if(0 == CoreId) {
     //Goto primary Main.
-    primary_main(PeiCoreEntryPoint);
+    PrimaryMain (PeiCoreEntryPoint);
   } else {
-    secondary_main(CoreId);
+    SecondaryMain (CoreId);
   }
 
   // PEI Core should always load and never return
@@ -101,7 +85,7 @@ SecTemporaryRamSupport (
 {
   //
   // Migrate the whole temporary memory to permenent memory.
-  // 
+  //
   CopyMem (
     (VOID*)(UINTN)PermanentMemoryBase, 
     (VOID*)(UINTN)TemporaryMemoryBase,