X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPlatformPkg%2FPrePeiCore%2FPrePeiCore.c;h=a61d0b88575da4a5579331b7a59f3af80dd43b64;hp=40a0e69bc074c50df3a0822dea47d9dfef75b732;hb=8fc38a3f50915b6b11b48f830f6c7b091dbb35d8;hpb=2637d1ef354a4db0e3fc676a8985ee40b5401eba

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 40a0e69bc0..a61d0b8857 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -13,47 +13,36 @@
 *
 **/
 
-#include <PiPei.h>
-#include <Ppi/TemporaryRamSupport.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
 #include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
+#include <Library/DebugAgentLib.h>
+#include <Library/PrintLib.h>
 #include <Library/ArmLib.h>
-#include <Chipset/ArmV7.h>
+#include <Library/SerialPortLib.h>
 
-EFI_STATUS
-EFIAPI
-SecTemporaryRamSupport (
-  IN CONST EFI_PEI_SERVICES   **PeiServices,
-  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
-  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
-  IN UINTN                    CopySize
-  );
+#include <Ppi/ArmGlobalVariable.h>
+#include <Chipset/ArmV7.h>
 
-VOID
-SecSwitchStack (
-  INTN    StackDelta
-  );
+#include "PrePeiCore.h"
 
-TEMPORARY_RAM_SUPPORT_PPI   mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
+EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI   mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
+ARM_GLOBAL_VARIABLE_PPI             mGlobalVariablePpi = { PrePeiCoreGetGlobalVariableMemory };
 
-EFI_PEI_PPI_DESCRIPTOR      gSecPpiTable[] = {
+EFI_PEI_PPI_DESCRIPTOR      gCommonPpiTable[] = {
   {
-    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
     &gEfiTemporaryRamSupportPpiGuid,
     &mSecTemporaryRamSupportPpi
+  },
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+    &gArmGlobalVariablePpiGuid,
+    &mGlobalVariablePpi
   }
 };
 
-// Vector Table for Pei Phase
-VOID  PeiVectorTable (VOID);
-
-
 VOID
 CEntryPoint (
-  IN  UINTN                     CoreId,
+  IN  UINTN                     MpId,
   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
   )
 {
@@ -64,8 +53,8 @@ CEntryPoint (
   ArmInvalidateInstructionCache();
 
   // Enable Instruction & Data caches
-  ArmEnableDataCache();
-  ArmEnableInstructionCache();
+  ArmEnableDataCache ();
+  ArmEnableInstructionCache ();
 
   //
   // Note: Doesn't have to Enable CPU interface in non-secure world,
@@ -79,11 +68,15 @@ CEntryPoint (
   //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.
 
   //If not primary Jump to Secondary Main
-  if(0 == CoreId) {
-    //Goto primary Main.
-    primary_main(PeiCoreEntryPoint);
+  if (IS_PRIMARY_CORE(MpId)) {
+    // Initialize the Debug Agent for Source Level Debugging
+    InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
+    SaveAndSetDebugTimerInterrupt (TRUE);
+
+    // Goto primary Main.
+    PrimaryMain (PeiCoreEntryPoint);
   } else {
-    secondary_main(CoreId);
+    SecondaryMain (MpId);
   }
 
   // PEI Core should always load and never return
@@ -101,7 +94,7 @@ SecTemporaryRamSupport (
 {
   //
   // Migrate the whole temporary memory to permenent memory.
-  // 
+  //
   CopyMem (
     (VOID*)(UINTN)PermanentMemoryBase, 
     (VOID*)(UINTN)TemporaryMemoryBase, 
@@ -110,6 +103,17 @@ SecTemporaryRamSupport (
 
   SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));
 
+EFI_STATUS
+PrePeiCoreGetGlobalVariableMemory (
+  OUT EFI_PHYSICAL_ADDRESS    *GlobalVariableBase
+  )
+{
+  ASSERT (GlobalVariableBase != NULL);
+
+  *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +
+                        (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
+                        (UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
+
   return EFI_SUCCESS;
 }