X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=ArmPlatformPkg%2FSec%2FSec.c;h=55807ec9d9dbb77e0c53e02063af22223bd24fc0;hp=b79537f5f652343f16008c64463bb5fe0e568d62;hb=9d6b024ded89621f1a643d0ddea6904375c4cc67;hpb=a8530889115f00c668c22d26c9272b7b173fbe30 diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index b79537f5f6..55807ec9d9 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -19,7 +19,6 @@ #include #include #include -#include #include "SecInternal.h" @@ -27,11 +26,13 @@ VOID CEntryPoint ( - IN UINTN MpId + IN UINTN MpId, + IN UINTN SecBootMode ) { CHAR8 Buffer[100]; UINTN CharCount; + UINTN JumpAddress; // Invalidate the data cache. Doesn't have to do the Data cache clean. ArmInvalidateDataCache(); @@ -49,11 +50,16 @@ CEntryPoint ( if (FixedPcdGet32 (PcdVFPEnabled)) { ArmEnableVFP(); } - + + // Initialize peripherals that must be done at the early stage + // Example: Some L2 controller, interconnect, clock, DMC, etc + ArmPlatformSecInitialize (MpId); + // Primary CPU clears out the SCU tag RAMs, secondaries wait - if (IS_PRIMARY_CORE(MpId)) { + if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) { if (ArmIsMpCore()) { - ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT); + // Signal for the initial memory is configured (event: BOOT_MEM_INIT) + ArmCallSEV (); } // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib @@ -61,17 +67,19 @@ CEntryPoint ( SerialPortInitialize (); // Start talking - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__); + if (FixedPcdGetBool (PcdTrustzoneSupport)) { + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Secure firmware (version %s built at %a on %a)\n\r", + (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__); + } else { + CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Boot firmware (version %s built at %a on %a)\n\r", + (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__); + } SerialPortWrite ((UINT8 *) Buffer, CharCount); // Initialize the Debug Agent for Source Level Debugging InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL); SaveAndSetDebugTimerInterrupt (TRUE); - // Now we've got UART, make the check: - // - The Vector table must be 32-byte aligned - ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0); - // Enable the GIC distributor and CPU Interface // - no other Interrupts are enabled, doesn't have to worry about the priority. // - all the cores are in secure state, use secure SGI's @@ -83,34 +91,22 @@ CEntryPoint ( } // Enable Full Access to CoProcessors - ArmWriteCPACR (CPACR_CP_FULL_ACCESS); - - if (IS_PRIMARY_CORE(MpId)) { - // Initialize peripherals that must be done at the early stage - // Example: Some L2x0 controllers must be initialized in Secure World - ArmPlatformSecInitialize (); - - // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase. - // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM - if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) { - // Initialize system memory (DRAM) - ArmPlatformInitializeSystemMemory (); - } - } + ArmWriteCpacr (CPACR_CP_FULL_ACCESS); // Test if Trustzone is supported on this platform if (FixedPcdGetBool (PcdTrustzoneSupport)) { - // Ensure the Monitor Stack Base & Size have been set - ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0); - ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0); - if (ArmIsMpCore()) { // Setup SMP in Non Secure world ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId)); } + // Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0)) + // Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0)) + ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) == 0)) || + ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0))); + // Enter Monitor Mode - enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1)))); + enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1)))); } else { if (IS_PRIMARY_CORE(MpId)) { SerialPrint ("Trust Zone Configuration is disabled\n\r"); @@ -121,39 +117,53 @@ CEntryPoint ( // Status Register as the the current one (CPSR). copy_cpsr_into_spsr (); - NonTrustedWorldTransition (MpId); + // Call the Platform specific function to execute additional actions if required + JumpAddress = PcdGet32 (PcdFvBaseAddress); + ArmPlatformSecExtraAction (MpId, &JumpAddress); + + NonTrustedWorldTransition (MpId, JumpAddress); } ASSERT (0); // We must never return from the above function } VOID TrustedWorldInitialization ( - IN UINTN MpId + IN UINTN MpId, + IN UINTN SecBootMode ) { + UINTN JumpAddress; + //-------------------- Monitor Mode --------------------- // Set up Monitor World (Vector Table, etc) ArmSecureMonitorWorldInitialize (); - // Setup the Trustzone Chipsets - if (IS_PRIMARY_CORE(MpId)) { - ArmPlatformTrustzoneInit (); + // Transfer the interrupt to Non-secure World + ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase)); - if (ArmIsMpCore()) { - // Waiting for the Primary Core to have finished to initialize the Secure World - ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT); - } - } else { - // The secondary cores need to wait until the Trustzone chipsets configuration is done - // before switching to Non Secure World + // Initialize platform specific security policy + ArmPlatformSecTrustzoneInit (MpId); - // Waiting for the Primary Core to have finished to initialize the Secure World - ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT); + // Setup the Trustzone Chipsets + if (SecBootMode == ARM_SEC_COLD_BOOT) { + if (IS_PRIMARY_CORE(MpId)) { + if (ArmIsMpCore()) { + // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT) + ArmCallSEV (); + } + } else { + // The secondary cores need to wait until the Trustzone chipsets configuration is done + // before switching to Non Secure World + + // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT) + ArmCallWFE (); + } } - // Transfer the interrupt to Non-secure World - ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase)); + // Call the Platform specific function to execute additional actions if required + JumpAddress = PcdGet32 (PcdFvBaseAddress); + ArmPlatformSecExtraAction (MpId, &JumpAddress); // Write to CP15 Non-secure Access Control Register ArmWriteNsacr (PcdGet32 (PcdArmNsacr)); @@ -161,19 +171,15 @@ TrustedWorldInitialization ( // CP15 Secure Configuration Register ArmWriteScr (PcdGet32 (PcdArmScr)); - NonTrustedWorldTransition (MpId); + NonTrustedWorldTransition (MpId, JumpAddress); } VOID NonTrustedWorldTransition ( - IN UINTN MpId + IN UINTN MpId, + IN UINTN JumpAddress ) { - UINTN JumpAddress; - - JumpAddress = PcdGet32 (PcdFvBaseAddress); - ArmPlatformSecExtraAction (MpId, &JumpAddress); - // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition // By not set, the mode for Non Secure World is SVC if (PcdGet32 (PcdArmNonSecModeTransition) != 0) { @@ -187,44 +193,3 @@ NonTrustedWorldTransition ( ASSERT (FALSE); } -VOID -SecCommonExceptionEntry ( - IN UINT32 Entry, - IN UINT32 LR - ) -{ - CHAR8 Buffer[100]; - UINTN CharCount; - - switch (Entry) { - case 0: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR); - break; - case 1: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR); - break; - case 2: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR); - break; - case 3: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR); - break; - case 4: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR); - break; - case 5: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR); - break; - case 6: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR); - break; - case 7: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR); - break; - default: - CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR); - break; - } - SerialPortWrite ((UINT8 *) Buffer, CharCount); - while(1); -}