X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=BeagleBoardPkg%2FSec%2FClock.c;h=8b05938bcb552fc88eabe5f026ba811f91eaa3f3;hp=2d814e49e990c60d640ef5c5d78af84f3a4ff3c7;hb=026e30c4bb80a73ac7c5c286711ae07b1c51108b;hpb=95572bd1b8b55fff0b714b3e3a5f923f38eae460;ds=sidebyside

diff --git a/BeagleBoardPkg/Sec/Clock.c b/BeagleBoardPkg/Sec/Clock.c
index 2d814e49e9..8b05938bcb 100644
--- a/BeagleBoardPkg/Sec/Clock.c
+++ b/BeagleBoardPkg/Sec/Clock.c
@@ -25,9 +25,9 @@ ClockInit (
   //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
 
   // Enable PLL5 and set to 120 MHz as a reference clock.
-  MmioWrite32(CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
-  MmioWrite32(CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
-  MmioWrite32(CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
+  MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
+  MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
+  MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
 
   // Turn on functional & interface clocks to the USBHOST power domain
   MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE