X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=CorebootModulePkg%2FSecCore%2FIa32%2FSecEntry.nasm;fp=CorebootModulePkg%2FSecCore%2FIa32%2FSecEntry.nasm;h=d3fab89045b1e69f5daef46241e62d24a66b711b;hp=0000000000000000000000000000000000000000;hb=365a3aab857a2820d36d2ae9b3b62f06230b295a;hpb=478f50990a9a3b76524fd14f2085b9f1127fa41a

diff --git a/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm b/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm
new file mode 100644
index 0000000000..d3fab89045
--- /dev/null
+++ b/CorebootModulePkg/SecCore/Ia32/SecEntry.nasm
@@ -0,0 +1,72 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Abstract:
+;
+;   Entry point for the coreboot UEFI payload.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+; C Functions
+extern  ASM_PFX(SecStartup)
+
+; Pcds
+extern  ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))
+
+;
+; SecCore Entry Point
+;
+; Processor is in flat protected mode
+;
+; @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[in]  DI    'BP': boot-strap processor, or 'AP': application processor
+; @param[in]  EBP   Pointer to the start of the Boot Firmware Volume
+;
+; @return     None  This routine does not return
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+  ;
+  ; Disable all the interrupts
+  ;
+  cli
+  ;
+  ; Construct the temporary memory at 0x80000, length 0x10000
+  ;
+  mov     esp, (BASE_512KB + SIZE_64KB)
+
+  ;
+  ; Pass BFV into the PEI Core
+  ;
+  push    DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]
+
+  ;
+  ; Pass stack base into the PEI Core
+  ;
+  push    BASE_512KB
+
+  ;
+  ; Pass stack size into the PEI Core
+  ;
+  push    SIZE_64KB
+
+  ;
+  ; Pass Control into the PEI Core
+  ;
+  call    ASM_PFX(SecStartup)
+
+  ;
+  ; Should never return
+  ;
+  jmp     $
+