X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=IntelFsp2Pkg%2FFspSecCore%2FSecFsp.c;h=216f7bb6c5eca797f888a3aa790d407d91b4d03f;hp=ae03fa228e7b01276fe67ed61144501cfe5e3fd2;hb=HEAD;hpb=111f2228ddf487b0ac3491e416bb3dcdcfa4f979
diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index ae03fa228e..11be1f97ca 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -16,19 +16,20 @@
@return FSP specific IDT gate descriptor.
**/
-UINT64
+IA32_IDT_GATE_DESCRIPTOR
FspGetExceptionHandler (
IN UINT64 IdtEntryTemplate
)
{
UINT32 Entry;
- UINT64 ExceptionHandler;
+ IA32_IDT_GATE_DESCRIPTOR ExceptionHandler;
IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor;
FSP_INFO_HEADER *FspInfoHeader;
- FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
- ExceptionHandler = IdtEntryTemplate;
- IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;
+ ZeroMem ((VOID *)&ExceptionHandler, sizeof (IA32_IDT_GATE_DESCRIPTOR));
+ FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
+ *(UINT64 *) &ExceptionHandler = IdtEntryTemplate;
+ IdtGateDescriptor = &ExceptionHandler;
Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;
Entry = FspInfoHeader->ImageBase + FspInfoHeader->ImageSize - (~Entry + 1);
IdtGateDescriptor->Bits.OffsetHigh = (UINT16)(Entry >> 16);
@@ -115,7 +116,7 @@ SecGetPlatformData (
VOID
FspGlobalDataInit (
IN OUT FSP_GLOBAL_DATA *PeiFspData,
- IN UINT32 BootLoaderStack,
+ IN UINTN BootLoaderStack,
IN UINT8 ApiIdx
)
{
@@ -130,10 +131,14 @@ FspGlobalDataInit (
ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA));
PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE;
- PeiFspData->Version = 0;
+ PeiFspData->Version = FSP_GLOBAL_DATA_VERSION;
PeiFspData->CoreStack = BootLoaderStack;
PeiFspData->PerfIdx = 2;
PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE;
+ //
+ // Cache FspHobList pointer passed by bootloader via ApiParameter2
+ //
+ PeiFspData->FspHobListPtr = (VOID **)GetFspApiParameter2 ();
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_ENTRY);
@@ -141,7 +146,7 @@ FspGlobalDataInit (
// Get FSP Header offset
// It may have multiple FVs, so look into the last one for FSP header
//
- PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
+ PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
SecGetPlatformData (PeiFspData);
//
@@ -154,7 +159,7 @@ FspGlobalDataInit (
//
FspmUpdDataPtr = (VOID *)GetFspApiParameter ();
if (FspmUpdDataPtr == NULL) {
- FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
+ FspmUpdDataPtr = (VOID *)(UINTN)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
}
SetFspUpdDataPointer (FspmUpdDataPtr);
@@ -199,8 +204,12 @@ FspGlobalDataInit (
ImageId, \
(PeiFspData->FspInfoHeader->ImageRevision >> 24) & 0xFF, \
(PeiFspData->FspInfoHeader->ImageRevision >> 16) & 0xFF, \
- (PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF, \
- PeiFspData->FspInfoHeader->ImageRevision & 0xFF
+ (PeiFspData->FspInfoHeader->HeaderRevision >= 6) ? \
+ (((PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF) | (PeiFspData->FspInfoHeader->ExtendedImageRevision & 0xFF00)) : \
+ ((PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF), \
+ (PeiFspData->FspInfoHeader->HeaderRevision >= 6) ? \
+ ((PeiFspData->FspInfoHeader->ImageRevision & 0xFF) | ((PeiFspData->FspInfoHeader->ExtendedImageRevision & 0xFF) << 8)) : \
+ (PeiFspData->FspInfoHeader->ImageRevision & 0xFF)
));
}
@@ -213,7 +222,7 @@ FspGlobalDataInit (
**/
VOID
FspDataPointerFixUp (
- IN UINT32 OffsetGap
+ IN UINTN OffsetGap
)
{
FSP_GLOBAL_DATA *NewFspData;