X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=IntelFsp2WrapperPkg%2FFspmWrapperPeim%2FFspmWrapperPeim.c;h=18f04b541a21714a115dab64cd2516ff16a30103;hp=0f6a7bdf40555bb7c5f5acb62dc8eb27fc5b4422;hb=7381bd3e753c4d3b706c752ec1d4305b3378af35;hpb=04147690b59bba6900e175c7d06e3fe48570ab73
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 0f6a7bdf40..18f04b541a 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -3,7 +3,7 @@
register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
notify to call FspSiliconInit API.
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -38,6 +38,7 @@
#include
#include
#include
+#include
extern EFI_GUID gFspHobGuid;
@@ -62,20 +63,29 @@ PeiFspMemoryInit (
DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n"));
FspHobListPtr = NULL;
+ FspmUpdDataPtr = NULL;
- //
- // Copy default FSP-M UPD data from Flash
- //
- FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
+ FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
if (FspmHeaderPtr == NULL) {
return EFI_DEVICE_ERROR;
}
- FspmUpdDataPtr = (FSPM_UPD_COMMON *)AllocateZeroPool ((UINTN)FspmHeaderPtr->CfgRegionSize);
- ASSERT (FspmUpdDataPtr != NULL);
- SourceData = (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + (UINTN)FspmHeaderPtr->CfgRegionOffset);
- CopyMem (FspmUpdDataPtr, SourceData, (UINTN)FspmHeaderPtr->CfgRegionSize);
+ if (PcdGet32 (PcdFspmUpdDataAddress) == 0 && (FspmHeaderPtr->CfgRegionSize != 0) && (FspmHeaderPtr->CfgRegionOffset != 0)) {
+ //
+ // Copy default FSP-M UPD data from Flash
+ //
+ FspmUpdDataPtr = (FSPM_UPD_COMMON *)AllocateZeroPool ((UINTN)FspmHeaderPtr->CfgRegionSize);
+ ASSERT (FspmUpdDataPtr != NULL);
+ SourceData = (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + (UINTN)FspmHeaderPtr->CfgRegionOffset);
+ CopyMem (FspmUpdDataPtr, SourceData, (UINTN)FspmHeaderPtr->CfgRegionSize);
+ } else {
+ //
+ // External UPD is ready, get the buffer from PCD pointer.
+ //
+ FspmUpdDataPtr = (FSPM_UPD_COMMON *)PcdGet32 (PcdFspmUpdDataAddress);
+ ASSERT (FspmUpdDataPtr != NULL);
+ }
DEBUG ((DEBUG_INFO, "UpdateFspmUpdData enter\n"));
UpdateFspmUpdData ((VOID *)FspmUpdDataPtr);
@@ -89,8 +99,8 @@ PeiFspMemoryInit (
TimeStampCounterStart = AsmReadTsc ();
Status = CallFspMemoryInit (FspmUpdDataPtr, &FspHobListPtr);
// Create hobs after memory initialization and not in temp RAM. Hence passing the recorded timestamp here
- PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, 0xD000);
- PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, 0xD07F);
+ PERF_START_EX(&gFspApiPerformanceGuid, "EventRec", NULL, TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
+ PERF_END_EX(&gFspApiPerformanceGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () - TimeStampCounterStart), 1000000)));
//
@@ -145,8 +155,20 @@ FspmWrapperInit (
{
EFI_STATUS Status;
- Status = PeiFspMemoryInit ();
- ASSERT_EFI_ERROR (Status);
+ Status = EFI_SUCCESS;
+
+ if (PcdGet8 (PcdFspModeSelection) == 1) {
+ Status = PeiFspMemoryInit ();
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ PeiServicesInstallFvInfoPpi (
+ NULL,
+ (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),
+ (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength,
+ NULL,
+ NULL
+ );
+ }
return Status;
}