X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=IntelFspWrapperPkg%2FLibrary%2FBaseFspApiLib%2FFspApiLib.c;h=accd6e495e448ea37f4668587f2825687a3c47c6;hp=162d244665dc3b1ea1fdda8e3291c4c3224a7454;hb=bcee1b9f172a606b1c4ee86dcda04c15718c4ed9;hpb=d953f4f1ae9cce2c09cd71aa3e2a2cb2283b33fa

diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
index 162d244665..accd6e495e 100644
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
@@ -1,7 +1,7 @@
 /** @file
   Provide FSP API related function.
 
-  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -98,7 +98,7 @@ CallFspInit (
   EFI_STATUS          Status;
   BOOLEAN             InterruptState;
 
-  FspInitApi = (FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);
+  FspInitApi = (FSP_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspInitEntryOffset);
   InterruptState = SaveAndDisableInterrupts ();
   Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);
   SetInterruptState (InterruptState);
@@ -125,7 +125,7 @@ CallFspNotifyPhase (
   EFI_STATUS          Status;
   BOOLEAN             InterruptState;
 
-  NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
+  NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
   InterruptState = SaveAndDisableInterrupts ();
   Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);
   SetInterruptState (InterruptState);
@@ -152,7 +152,7 @@ CallFspMemoryInit (
   EFI_STATUS          Status;
   BOOLEAN             InterruptState;
 
-  FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
+  FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
   InterruptState = SaveAndDisableInterrupts ();
   Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);
   SetInterruptState (InterruptState);
@@ -179,7 +179,7 @@ CallTempRamExit (
   EFI_STATUS          Status;
   BOOLEAN             InterruptState;
 
-  TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
+  TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
   InterruptState = SaveAndDisableInterrupts ();
   Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);
   SetInterruptState (InterruptState);
@@ -206,7 +206,7 @@ CallFspSiliconInit (
   EFI_STATUS          Status;
   BOOLEAN             InterruptState;
 
-  FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
+  FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
   InterruptState = SaveAndDisableInterrupts ();
   Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);
   SetInterruptState (InterruptState);