X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=IntelSiliconPkg%2FIntelVTdDxe%2FVtdReg.c;h=1404af7cd7817fb4163b9eb01e7ad2df66631d87;hp=b1178b70744d84e3ee39c083f4ae37152e9d8fb8;hb=ffe77707a320077373d35029ba5b43253da6fd05;hpb=4ad5f597153c7cb20a968236c2c7d6ff01994350 diff --git a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c index b1178b7074..1404af7cd7 100644 --- a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c +++ b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c @@ -187,14 +187,47 @@ PrepareVtdConfig ( } DomainNumber = (UINTN)1 << (UINT8)((UINTN)mVtdUnitInformation[Index].CapReg.Bits.ND * 2 + 4); - if (mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber >= DomainNumber) { - DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >= DomainNumber(0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber, DomainNumber)); + if (mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber >= DomainNumber) { + DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >= DomainNumber(0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber, DomainNumber)); return ; } } return ; } +/** + Disable PMR in all VTd engine. +**/ +VOID +DisablePmr ( + VOID + ) +{ + UINT32 Reg32; + VTD_CAP_REG CapReg; + UINTN Index; + + DEBUG ((DEBUG_INFO,"DisablePmr\n")); + for (Index = 0; Index < mVtdUnitNumber; Index++) { + CapReg.Uint64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CAP_REG); + if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) { + continue ; + } + + Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG); + if ((Reg32 & BIT0) != 0) { + MmioWrite32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG, 0x0); + do { + Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG); + } while((Reg32 & BIT0) != 0); + DEBUG ((DEBUG_INFO,"Pmr(%d) disabled\n", Index)); + } else { + DEBUG ((DEBUG_INFO,"Pmr(%d) not enabled\n", Index)); + } + } + return ; +} + /** Enable DMAR translation. @@ -259,6 +292,11 @@ EnableDmar ( DEBUG ((DEBUG_INFO,"VTD (%d) enabled!<<<<<<\n",Index)); } + // + // Need disable PMR, since we already setup translation table. + // + DisablePmr (); + mVtdEnabled = TRUE; return EFI_SUCCESS; @@ -305,13 +343,13 @@ DisableDmar ( for (Index = 0; Index < mVtdUnitNumber; Index++) { DEBUG((DEBUG_INFO, "engine [%d] access\n", Index)); - for (SubIndex = 0; SubIndex < mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber; SubIndex++) { + for (SubIndex = 0; SubIndex < mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber; SubIndex++) { DEBUG ((DEBUG_INFO, " PCI S%04X B%02x D%02x F%02x - %d\n", mVtdUnitInformation[Index].Segment, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].Bits.Bus, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].Bits.Device, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].Bits.Function, - mVtdUnitInformation[Index].PciDeviceInfo.AccessCount[SubIndex] + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Bus, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Device, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciSourceId.Bits.Function, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].AccessCount )); } } @@ -502,15 +540,26 @@ DumpVtdIfError ( for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) { FrcdReg.Uint64[0] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG)); FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64))); - if ((FrcdReg.Uint64[0] != 0) || (FrcdReg.Uint64[1] != 0)) { + if (FrcdReg.Bits.F != 0) { HasError = TRUE; } } if (HasError) { - DEBUG((DEBUG_INFO, "#### ERROR ####\n")); + DEBUG((DEBUG_INFO, "\n#### ERROR ####\n")); DumpVtdRegs (Num); - DEBUG((DEBUG_INFO, "#### ERROR ####\n")); + DEBUG((DEBUG_INFO, "#### ERROR ####\n\n")); + // + // Clear + // + for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) { + FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64))); + if (FrcdReg.Bits.F != 0) { + FrcdReg.Bits.F = 0; + MmioWrite64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)), FrcdReg.Uint64[1]); + } + MmioWrite32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG, MmioRead32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG)); + } } } }