X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FPciBusDxe%2FPciLib.c;h=a5cea9e52a0d2b590569c7dc63cfd275f505c0c4;hp=87ee61956ac92f501c181294b7cde4534fe1ab71;hb=ea8d98fa9f862ba533448983f81a79e4e71008f5;hpb=306bbe82cb0bae51db9b4ee0a891fd97660be769;ds=sidebyside diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c index 87ee61956a..a5cea9e52a 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -1,7 +1,7 @@ /** @file Internal library implementation for PCI Bus module. -Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -182,7 +182,7 @@ DumpBridgeResource ( if ((BridgeResource != NULL) && (BridgeResource->Length != 0)) { DEBUG (( - EFI_D_INFO, "Type = %s; Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x\n", + EFI_D_INFO, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n", mBarTypeStr[MIN (BridgeResource->ResType, PciBarTypeMaxType)], BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress, BridgeResource->Length, BridgeResource->Alignment @@ -195,7 +195,7 @@ DumpBridgeResource ( if (Resource->ResourceUsage == PciResUsageTypical) { Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar; DEBUG (( - EFI_D_INFO, " Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x;\tOwner = %s ", + EFI_D_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s ", Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment, IS_PCI_BRIDGE (&Resource->PciDev->Pci) ? L"PPB" : IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) ? L"P2C" : @@ -225,7 +225,7 @@ DumpBridgeResource ( )); } } else { - DEBUG ((EFI_D_INFO, " Padding:Length = 0x%x;\tAlignment = 0x%x\n", Resource->Length, Resource->Alignment)); + DEBUG ((EFI_D_INFO, " Padding:Length = 0x%lx;\tAlignment = 0x%lx\n", Resource->Length, Resource->Alignment)); } } } @@ -568,6 +568,12 @@ PciHostBridgeResourceAllocator ( RootBridgeDev->Handle, AcpiConfig ); + // + // If SubmitResources returns error, PciBus isn't able to start. + // It's a fatal error so assertion is added. + // + DEBUG ((EFI_D_INFO, "PciBus: HostBridge->SubmitResources() - %r\n", Status)); + ASSERT_EFI_ERROR (Status); } // @@ -598,6 +604,7 @@ PciHostBridgeResourceAllocator ( // Notify platform to start to program the resource // Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeAllocateResources); + DEBUG ((EFI_D_INFO, "PciBus: HostBridge->NotifyPhase(AllocateResources) - %r\n", Status)); if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) { // // If Hot Plug is not supported @@ -752,7 +759,11 @@ PciHostBridgeResourceAllocator ( // // Notify pci bus driver starts to program the resource // - NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources); + Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources); + + if (EFI_ERROR (Status)) { + return Status; + } RootBridgeDev = NULL; @@ -891,9 +902,9 @@ PciHostBridgeResourceAllocator ( // // Notify the resource allocation phase is to end // - NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation); + Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation); - return EFI_SUCCESS; + return Status; } /** @@ -937,13 +948,13 @@ PciAllocateBusNumber ( while (BusNumberRanges->Desc != ACPI_END_TAG_DESCRIPTOR) { MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1; if (StartBusNumber >= BusNumberRanges->AddrRangeMin && StartBusNumber <= MaxNumberInRange) { - NextNumber = StartBusNumber + NumberOfBuses; + NextNumber = (UINT8)(StartBusNumber + NumberOfBuses); while (NextNumber > MaxNumberInRange) { ++BusNumberRanges; if (BusNumberRanges->Desc == ACPI_END_TAG_DESCRIPTOR) { return EFI_OUT_OF_RESOURCES; } - NextNumber += (UINT8)(BusNumberRanges->AddrRangeMin - (MaxNumberInRange + 1)); + NextNumber = (UINT8)(NextNumber + (BusNumberRanges->AddrRangeMin - (MaxNumberInRange + 1))); MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1; } *NextBusNumber = NextNumber; @@ -1436,7 +1447,11 @@ PciHostBridgeEnumerator ( // // Notify the bus allocation phase is about to start // - NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation); + Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation); + + if (EFI_ERROR (Status)) { + return Status; + } DEBUG((EFI_D_INFO, "PCI Bus First Scanning\n")); RootBridgeHandle = NULL; @@ -1524,7 +1539,11 @@ PciHostBridgeEnumerator ( // // Notify the bus allocation phase is about to start for the 2nd time // - NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation); + Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation); + + if (EFI_ERROR (Status)) { + return Status; + } DEBUG((EFI_D_INFO, "PCI Bus Second Scanning\n")); RootBridgeHandle = NULL; @@ -1562,7 +1581,11 @@ PciHostBridgeEnumerator ( // // Notify the resource allocation phase is to start // - NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation); + Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation); + + if (EFI_ERROR (Status)) { + return Status; + } RootBridgeHandle = NULL; while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {