X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FPciBusDxe%2FPciOptionRomSupport.c;h=c2be85a906af289ce694dc5f2114ce6d6be007a4;hp=2bc4f8c5e8573a144e05ea21605d17a7479a994a;hb=07eba7069d4c23e9b15caa1e729682a88ddf4ada;hpb=483d0d85a74eb96e5bf12bf07ca9d51af679db9d diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c index 2bc4f8c5e8..c2be85a906 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c @@ -1,7 +1,7 @@ /** @file PCI Rom supporting funtions implementation for PCI Bus module. -Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -305,7 +305,7 @@ GetOpRomInfo ( return EFI_NOT_FOUND; } - PciIoDevice->RomSize = (UINT64) ((~AllOnes) + 1); + PciIoDevice->RomSize = (~AllOnes) + 1; return EFI_SUCCESS; } @@ -342,7 +342,7 @@ ContainEfiImage ( } // - // The PCI Data Structure must be DWORD aligned. + // The PCI Data Structure must be DWORD aligned. // if (RomHeader->PcirOffset == 0 || (RomHeader->PcirOffset & 3) != 0 || @@ -471,8 +471,8 @@ LoadOpRomImage ( FirstCheck = FALSE; OffsetPcir = RomHeader->PcirOffset; // - // If the pointer to the PCI Data Structure is invalid, no further images can be located. - // The PCI Data Structure must be DWORD aligned. + // If the pointer to the PCI Data Structure is invalid, no further images can be located. + // The PCI Data Structure must be DWORD aligned. // if (OffsetPcir == 0 || (OffsetPcir & 3) != 0 || @@ -551,7 +551,7 @@ LoadOpRomImage ( PciDevice->BusNumber, PciDevice->DeviceNumber, PciDevice->FunctionNumber, - (UINT64) (UINTN) PciDevice->PciIo.RomImage, + PciDevice->PciIo.RomImage, PciDevice->PciIo.RomSize ); @@ -753,30 +753,37 @@ ProcessOpRomImage ( BufferSize, &ImageHandle ); - - FreePool (PciOptionRomImageDevicePath); - - if (!EFI_ERROR (Status)) { + if (EFI_ERROR (Status)) { + // + // Record the Option ROM Image device path when LoadImage fails. + // PciOverride.GetDriver() will try to look for the Image Handle using the device path later. + // + AddDriver (PciDevice, NULL, PciOptionRomImageDevicePath); + } else { Status = gBS->StartImage (ImageHandle, NULL, NULL); if (!EFI_ERROR (Status)) { - AddDriver (PciDevice, ImageHandle); + // + // Record the Option ROM Image Handle + // + AddDriver (PciDevice, ImageHandle, NULL); PciRomAddImageMapping ( ImageHandle, PciDevice->PciRootBridgeIo->SegmentNumber, PciDevice->BusNumber, PciDevice->DeviceNumber, PciDevice->FunctionNumber, - (UINT64) (UINTN) PciDevice->PciIo.RomImage, + PciDevice->PciIo.RomImage, PciDevice->PciIo.RomSize ); RetStatus = EFI_SUCCESS; } } + FreePool (PciOptionRomImageDevicePath); NextImage: RomBarOffset += ImageSize; - } while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize)); + } while (((Indicator & 0x80) == 0x00) && (((UINTN) RomBarOffset - (UINTN) RomBar) < PciDevice->RomSize)); return RetStatus; }