X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FUhciDxe%2FUhci.c;h=b52510041f8e6ecf531a055eba806a4fd9e18af8;hp=8cda00fbda9f106cdc140ecf48ab8ab6f98b7e7d;hb=6a6d955c5f670141344c614c65dbea332f393b57;hpb=c52fa98ca98ceaab75e8ddf9ebcfbcbd323bab13

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 8cda00fbda..b52510041f 100644
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -56,38 +56,27 @@ UhciReset (
     //
     // Stop schedule and set the Global Reset bit in the command register
     //
-    UhciStopHc (Uhc, STALL_1_SECOND);
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
 
-    //
-    // Wait 50ms for root port to let reset complete
-    // See UHCI spec page122 Reset signaling
-    //
-    gBS->Stall (ROOT_PORT_REST_TIME);
+    gBS->Stall (UHC_ROOT_PORT_RESET_STALL);
 
     //
     // Clear the Global Reset bit to zero.
     //
     UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);
 
-    //
-    // UHCI spec page120 reset recovery time
-    //
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
     break;
 
   case EFI_USB_HC_RESET_HOST_CONTROLLER:
     //
     // Stop schedule and set Host Controller Reset bit to 1
     //
-    UhciStopHc (Uhc, STALL_1_SECOND);
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);
 
-    //
-    // this bit will be reset by Host Controller when reset is completed.
-    // wait 10ms to let reset complete
-    //
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);
     break;
 
   default:
@@ -202,7 +191,7 @@ UhciSetState (
 
   switch (State) {
   case EfiUsbHcStateHalt:
-    Status = UhciStopHc (Uhc, STALL_1_SECOND);
+    Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
     break;
 
   case EfiUsbHcStateOperational:
@@ -228,7 +217,7 @@ UhciSetState (
       //
       // wait 20ms to let resume complete (20ms is specified by UHCI spec)
       //
-      gBS->Stall (FORCE_GLOBAL_RESUME_TIME);
+      gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);
 
       //
       // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0
@@ -1828,8 +1817,6 @@ Uhci2AsyncIsochronousTransfer (
   return EFI_UNSUPPORTED;
 }
 
-//@MT: EFI_DRIVER_ENTRY_POINT (UhciDriverEntryPoint)
-
 EFI_STATUS
 EFIAPI
 UhciDriverEntryPoint (
@@ -1854,14 +1841,13 @@ UhciDriverEntryPoint (
 
 --*/
 {
-  return EfiLibInstallAllDriverProtocols (
+  return EfiLibInstallDriverBindingComponentName2 (
            ImageHandle,
            SystemTable,
            &gUhciDriverBinding,
            ImageHandle,
            &gUhciComponentName,
-           NULL,
-           NULL
+           &gUhciComponentName2
            );
 }
 
@@ -1955,7 +1941,8 @@ ON_EXIT:
 STATIC
 USB_HC_DEV *
 UhciAllocateDev (
-  IN EFI_PCI_IO_PROTOCOL    *PciIo
+  IN EFI_PCI_IO_PROTOCOL    *PciIo,
+  IN UINT64                 OriginalPciAttributes
   )
 {
   USB_HC_DEV  *Uhc;
@@ -2004,8 +1991,9 @@ UhciAllocateDev (
   Uhc->Usb2Hc.MajorRevision             = 0x1;
   Uhc->Usb2Hc.MinorRevision             = 0x1;
 
-  Uhc->PciIo   = PciIo;
-  Uhc->MemPool = UsbHcInitMemPool (PciIo, TRUE, 0);
+  Uhc->PciIo                 = PciIo;
+  Uhc->OriginalPciAttributes = OriginalPciAttributes;
+  Uhc->MemPool               = UsbHcInitMemPool (PciIo, TRUE, 0);
 
   if (Uhc->MemPool == NULL) {
     Status = EFI_OUT_OF_RESOURCES;
@@ -2087,7 +2075,7 @@ UhciCleanDevUp (
   // Uninstall the USB_HC and USB_HC2 protocol, then disable the controller
   //
   Uhc = UHC_FROM_USB_HC_PROTO (This);
-  UhciStopHc (Uhc, STALL_1_SECOND);
+  UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);
 
   gBS->UninstallProtocolInterface (
         Controller,
@@ -2104,12 +2092,15 @@ UhciCleanDevUp (
   UhciFreeAllAsyncReq (Uhc);
   UhciDestoryFrameList (Uhc);
 
+  //
+  // Restore original PCI attributes
+  //
   Uhc->PciIo->Attributes (
-                Uhc->PciIo,
-                EfiPciIoAttributeOperationDisable,
-                EFI_PCI_DEVICE_ENABLE,
-                NULL
-                );
+                  Uhc->PciIo,
+                  EfiPciIoAttributeOperationSet,
+                  Uhc->OriginalPciAttributes,
+                  NULL
+                  );
 
   UhciFreeDev (Uhc);
 }
@@ -2140,6 +2131,9 @@ UhciDriverBindingStart (
   EFI_STATUS          Status;
   EFI_PCI_IO_PROTOCOL *PciIo;
   USB_HC_DEV          *Uhc;
+  UINT64              Supports;
+  UINT64              OriginalPciAttributes;
+  BOOLEAN             PciAttributesSaved;
 
   //
   // Open PCIIO, then enable the EHC device and turn off emulation
@@ -2158,20 +2152,45 @@ UhciDriverBindingStart (
     return Status;
   }
 
+  PciAttributesSaved = FALSE;
+  //
+  // Save original PCI attributes
+  //
+  Status = PciIo->Attributes (
+                    PciIo,
+                    EfiPciIoAttributeOperationGet,
+                    0,
+                    &OriginalPciAttributes
+                    );
+
+  if (EFI_ERROR (Status)) {
+    goto CLOSE_PCIIO;
+  }
+  PciAttributesSaved = TRUE;
+
   UhciTurnOffUsbEmulation (PciIo);
 
   Status = PciIo->Attributes (
                     PciIo,
-                    EfiPciIoAttributeOperationEnable,
-                    EFI_PCI_DEVICE_ENABLE,
-                    NULL
+                    EfiPciIoAttributeOperationSupported,
+                    0,
+                    &Supports
                     );
+  if (!EFI_ERROR (Status)) {
+    Supports &= EFI_PCI_DEVICE_ENABLE;
+    Status = PciIo->Attributes (
+                      PciIo,
+                      EfiPciIoAttributeOperationEnable,
+                      Supports,
+                      NULL
+                      );
+  }
 
   if (EFI_ERROR (Status)) {
     goto CLOSE_PCIIO;
   }
 
-  Uhc = UhciAllocateDev (PciIo);
+  Uhc = UhciAllocateDev (PciIo, OriginalPciAttributes);
 
   if (Uhc == NULL) {
     Status = EFI_OUT_OF_RESOURCES;
@@ -2191,7 +2210,7 @@ UhciDriverBindingStart (
   Status = gBS->SetTimer (
                   Uhc->AsyncIntMonitor,
                   TimerPeriodic,
-                  INTERRUPT_POLLING_TIME
+                  UHC_ASYNC_POLL_INTERVAL
                   );
 
   if (EFI_ERROR (Status)) {
@@ -2219,13 +2238,22 @@ UhciDriverBindingStart (
   //
   Uhc->CtrlNameTable = NULL;
 
-  AddUnicodeString (
+  AddUnicodeString2 (
     "eng",
     gUhciComponentName.SupportedLanguages,
     &Uhc->CtrlNameTable,
-    L"Usb Universal Host Controller"
+    L"Usb Universal Host Controller",
+    TRUE
+    );
+  AddUnicodeString2 (
+    "en",
+    gUhciComponentName2.SupportedLanguages,
+    &Uhc->CtrlNameTable,
+    L"Usb Universal Host Controller",
+    FALSE
     );
 
+
   //
   // Start the UHCI hardware, also set its reclamation point to 64 bytes
   //
@@ -2237,6 +2265,18 @@ FREE_UHC:
   UhciFreeDev (Uhc);
 
 CLOSE_PCIIO:
+  if (PciAttributesSaved == TRUE) {
+    //
+    // Restore original PCI attributes
+    //
+    PciIo->Attributes (
+                    PciIo,
+                    EfiPciIoAttributeOperationSet,
+                    OriginalPciAttributes,
+                    NULL
+                    );
+  }
+
   gBS->CloseProtocol (
         Controller,
         &gEfiPciIoProtocolGuid,