X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FIndustryStandard%2FPciExpress21.h;h=d90b5975ba922a47550121a978075b90625ee7e3;hp=175c82c88ee0e06ee163135574a5a773a0428a79;hb=400a59737fc3d14b0acc0b0a66a294bb6db894b6;hpb=cbedba8698b1a9f6e2e440219d03a263e09d2822

diff --git a/MdePkg/Include/IndustryStandard/PciExpress21.h b/MdePkg/Include/IndustryStandard/PciExpress21.h
index 175c82c88e..d90b5975ba 100644
--- a/MdePkg/Include/IndustryStandard/PciExpress21.h
+++ b/MdePkg/Include/IndustryStandard/PciExpress21.h
@@ -1,7 +1,7 @@
 /** @file
   Support for the latest PCI standard.
 
-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>  
   This program and the accompanying materials                          
   are licensed and made available under the terms and conditions of the BSD License         
@@ -18,6 +18,23 @@
 
 #include <IndustryStandard/Pci30.h>
 
+/**
+  Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+  ECAM (Enhanced Configuration Access Mechanism) address. The unused upper bits
+  of Bus, Device, Function and Register are stripped prior to the generation of
+  the address.
+
+  @param  Bus       PCI Bus number. Range 0..255.
+  @param  Device    PCI Device number. Range 0..31.
+  @param  Function  PCI Function number. Range 0..7.
+  @param  Register  PCI Register number. Range 0..4095.
+
+  @return The encode ECAM address.
+
+**/
+#define PCI_ECAM_ADDRESS(Bus,Device,Function,Offset) \
+  (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+
 #pragma pack(1)
 ///
 /// PCI Express Capability Structure
@@ -165,18 +182,18 @@ typedef union {
 
 typedef union {
   struct {
-    UINT32 AttentionButtonPressed : 1;
-    UINT32 PowerFaultDetected : 1;
-    UINT32 MrlSensorChanged : 1;
-    UINT32 PresenceDetectChanged : 1;
-    UINT32 CommandCompletedInterrupt : 1;
-    UINT32 HotPlugInterrupt : 1;
-    UINT32 AttentionIndicator : 2;
-    UINT32 PowerIndicator : 2;
-    UINT32 PowerController : 1;
-    UINT32 ElectromechanicalInterlock : 1;
-    UINT32 DataLinkLayerStateChanged : 1;
-    UINT32 Reserved : 3;
+    UINT16 AttentionButtonPressed : 1;
+    UINT16 PowerFaultDetected : 1;
+    UINT16 MrlSensorChanged : 1;
+    UINT16 PresenceDetectChanged : 1;
+    UINT16 CommandCompletedInterrupt : 1;
+    UINT16 HotPlugInterrupt : 1;
+    UINT16 AttentionIndicator : 2;
+    UINT16 PowerIndicator : 2;
+    UINT16 PowerController : 1;
+    UINT16 ElectromechanicalInterlock : 1;
+    UINT16 DataLinkLayerStateChanged : 1;
+    UINT16 Reserved : 3;
   } Bits;
   UINT16   Uint16;
 } PCI_REG_PCIE_SLOT_CONTROL;