X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FCpuLib.h;h=3187d736b72e4f3033085f18b8f2ef3d2f6fe9ba;hp=043c727c723f055235fcc6e849f0ec646787ff6f;hb=9344f0921518309295da89c221d10cbead8531aa;hpb=8336fd87df501f8bb26c47d4f216710fc9420ebd

diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h
index 043c727c72..3187d736b7 100644
--- a/MdePkg/Include/Library/CpuLib.h
+++ b/MdePkg/Include/Library/CpuLib.h
@@ -1,60 +1,45 @@
 /** @file
-  Library that provides processor specific library services
+  Provides CPU architecture specific functions that can not be defined
+  in the Base Library due to dependencies on the PAL Library
 
-  Copyright (c) 2006, Intel Corporation                                                         
-  All rights reserved. This program and the accompanying materials                          
-  are licensed and made available under the terms and conditions of the BSD License         
-  which accompanies this distribution.  The full text of the license may be found at        
-  http://opensource.org/licenses/bsd-license.php                                            
+  The CPU Library provides services to flush CPU TLBs and place the CPU in a sleep state.
+  The implementation of these services on Itanium processors requires the use of PAL Calls.
+  PAL Calls require PEI and DXE specific mechanisms to look up PAL Entry Point.
+  As a result, these services could not be defined in the Base Library.
 
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
 #ifndef __CPU_LIB_H__
 #define __CPU_LIB_H__
 
-/**
-  Places the CPU in a sleep state until an interrupt is received.
-
-  Places the CPU in a sleep state until an interrupt is received. If interrupts
-  are disabled prior to calling this function, then the CPU will be placed in a
-  sleep state indefinitely.
-
-**/
-VOID
-EFIAPI
-CpuSleep (
-  VOID
-  );
-
-
-/**
-  Requests CPU to pause for a short period of time.
-
-  Requests CPU to pause for a short period of time. Typically used in MP
-  systems to prevent memory starvation while waiting for a spin lock.
-
-**/
-VOID
-EFIAPI
-CpuPause (
-  VOID
-  );
-
-
-/**
-  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
-
-  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
-
-**/
-VOID
-EFIAPI
-CpuFlushTlb (
-  VOID
-  );
-
+/**
+  Places the CPU in a sleep state until an interrupt is received.
+
+  Places the CPU in a sleep state until an interrupt is received. If interrupts
+  are disabled prior to calling this function, then the CPU will be placed in a
+  sleep state indefinitely.
+
+**/
+VOID
+EFIAPI
+CpuSleep (
+  VOID
+  );
+
+/**
+  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+**/
+VOID
+EFIAPI
+CpuFlushTlb (
+  VOID
+  );
+
 
 #endif