X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciCf8Lib.h;h=05b5fddef508341efad4f2db7b1705dae3922753;hp=13af84ed34c0042bde92c1eeed64369092edccb9;hb=HEAD;hpb=fb3df220f89e6eecaf1862b9241d8a1214eeda1c diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h index 13af84ed34..05b5fddef5 100644 --- a/MdePkg/Include/Library/PciCf8Lib.h +++ b/MdePkg/Include/Library/PciCf8Lib.h @@ -1,23 +1,18 @@ /** @file - PCI CF8 Library Services for PCI Segment #0 + Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC. - Copyright (c) 2006, Intel Corporation - All rights reserved. This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php + This library is identical to the PCI Library, except the access method for performing PCI + configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows + access to PCI Segment #0. - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - Module Name: PciCf8Lib.h +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent **/ #ifndef __PCI_CF8_LIB_H__ #define __PCI_CF8_LIB_H__ - /** Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an address that can be passed to the PCI Library functions. @@ -34,9 +29,37 @@ @return The encode PCI address. **/ -#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \ +#define PCI_CF8_LIB_ADDRESS(Bus, Device, Function, Offset) \ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) +/** + Registers a PCI device so PCI configuration registers may be accessed after + SetVirtualAddressMap(). + + Registers the PCI device specified by Address so all the PCI configuration registers + associated with that PCI device may be accessed after SetVirtualAddressMap() is called. + + If Address > 0x0FFFFFFF, then ASSERT(). + If the register specified by Address >= 0x100, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @retval RETURN_SUCCESS The PCI device was registered for runtime access. + @retval RETURN_UNSUPPORTED An attempt was made to call this function + after ExitBootServices(). + @retval RETURN_UNSUPPORTED The resources required to access the PCI device + at runtime could not be mapped. + @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to + complete the registration. + +**/ +RETURN_STATUS +EFIAPI +PciCf8RegisterForRuntimeAccess ( + IN UINTN Address + ); + /** Reads an 8-bit PCI configuration register. @@ -56,7 +79,7 @@ UINT8 EFIAPI PciCf8Read8 ( - IN UINTN Address + IN UINTN Address ); /** @@ -79,16 +102,16 @@ PciCf8Read8 ( UINT8 EFIAPI PciCf8Write8 ( - IN UINTN Address, - IN UINT8 Data + IN UINTN Address, + IN UINT8 Value ); /** - Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -107,8 +130,8 @@ PciCf8Write8 ( UINT8 EFIAPI PciCf8Or8 ( - IN UINTN Address, - IN UINT8 OrData + IN UINTN Address, + IN UINT8 OrData ); /** @@ -135,17 +158,17 @@ PciCf8Or8 ( UINT8 EFIAPI PciCf8And8 ( - IN UINTN Address, - IN UINT8 AndData + IN UINTN Address, + IN UINT8 AndData ); /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit - value, followed a bitwise inclusive OR with another 8-bit value. + value, followed a bitwise OR with another 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -165,9 +188,9 @@ PciCf8And8 ( UINT8 EFIAPI PciCf8AndThenOr8 ( - IN UINTN Address, - IN UINT8 AndData, - IN UINT8 OrData + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData ); /** @@ -195,9 +218,9 @@ PciCf8AndThenOr8 ( UINT8 EFIAPI PciCf8BitFieldRead8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -213,6 +236,7 @@ PciCf8BitFieldRead8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -227,10 +251,10 @@ PciCf8BitFieldRead8 ( UINT8 EFIAPI PciCf8BitFieldWrite8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value ); /** @@ -238,7 +262,7 @@ PciCf8BitFieldWrite8 ( writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -249,6 +273,7 @@ PciCf8BitFieldWrite8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -263,10 +288,10 @@ PciCf8BitFieldWrite8 ( UINT8 EFIAPI PciCf8BitFieldOr8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData ); /** @@ -285,6 +310,7 @@ PciCf8BitFieldOr8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -299,19 +325,19 @@ PciCf8BitFieldOr8 ( UINT8 EFIAPI PciCf8BitFieldAnd8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData ); /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -323,6 +349,8 @@ PciCf8BitFieldAnd8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -338,11 +366,11 @@ PciCf8BitFieldAnd8 ( UINT8 EFIAPI PciCf8BitFieldAndThenOr8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 AndData, - IN UINT8 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData ); /** @@ -365,7 +393,7 @@ PciCf8BitFieldAndThenOr8 ( UINT16 EFIAPI PciCf8Read16 ( - IN UINTN Address + IN UINTN Address ); /** @@ -389,16 +417,16 @@ PciCf8Read16 ( UINT16 EFIAPI PciCf8Write16 ( - IN UINTN Address, - IN UINT16 Data + IN UINTN Address, + IN UINT16 Value ); /** - Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -418,8 +446,8 @@ PciCf8Write16 ( UINT16 EFIAPI PciCf8Or16 ( - IN UINTN Address, - IN UINT16 OrData + IN UINTN Address, + IN UINT16 OrData ); /** @@ -447,17 +475,17 @@ PciCf8Or16 ( UINT16 EFIAPI PciCf8And16 ( - IN UINTN Address, - IN UINT16 AndData + IN UINTN Address, + IN UINT16 AndData ); /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit - value, followed a bitwise inclusive OR with another 16-bit value. + value, followed a bitwise OR with another 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -478,9 +506,9 @@ PciCf8And16 ( UINT16 EFIAPI PciCf8AndThenOr16 ( - IN UINTN Address, - IN UINT16 AndData, - IN UINT16 OrData + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData ); /** @@ -509,9 +537,9 @@ PciCf8AndThenOr16 ( UINT16 EFIAPI PciCf8BitFieldRead16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -528,6 +556,7 @@ PciCf8BitFieldRead16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -542,10 +571,10 @@ PciCf8BitFieldRead16 ( UINT16 EFIAPI PciCf8BitFieldWrite16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value ); /** @@ -553,7 +582,7 @@ PciCf8BitFieldWrite16 ( writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -565,6 +594,7 @@ PciCf8BitFieldWrite16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -579,10 +609,10 @@ PciCf8BitFieldWrite16 ( UINT16 EFIAPI PciCf8BitFieldOr16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData ); /** @@ -602,6 +632,7 @@ PciCf8BitFieldOr16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -616,19 +647,19 @@ PciCf8BitFieldOr16 ( UINT16 EFIAPI PciCf8BitFieldAnd16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData ); /** Reads a bit field in a 16-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -641,6 +672,8 @@ PciCf8BitFieldAnd16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -656,11 +689,11 @@ PciCf8BitFieldAnd16 ( UINT16 EFIAPI PciCf8BitFieldAndThenOr16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 AndData, - IN UINT16 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData ); /** @@ -683,7 +716,7 @@ PciCf8BitFieldAndThenOr16 ( UINT32 EFIAPI PciCf8Read32 ( - IN UINTN Address + IN UINTN Address ); /** @@ -707,16 +740,16 @@ PciCf8Read32 ( UINT32 EFIAPI PciCf8Write32 ( - IN UINTN Address, - IN UINT32 Data + IN UINTN Address, + IN UINT32 Value ); /** - Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -736,8 +769,8 @@ PciCf8Write32 ( UINT32 EFIAPI PciCf8Or32 ( - IN UINTN Address, - IN UINT32 OrData + IN UINTN Address, + IN UINT32 OrData ); /** @@ -765,17 +798,17 @@ PciCf8Or32 ( UINT32 EFIAPI PciCf8And32 ( - IN UINTN Address, - IN UINT32 AndData + IN UINTN Address, + IN UINT32 AndData ); /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit - value, followed a bitwise inclusive OR with another 32-bit value. + value, followed a bitwise OR with another 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -796,9 +829,9 @@ PciCf8And32 ( UINT32 EFIAPI PciCf8AndThenOr32 ( - IN UINTN Address, - IN UINT32 AndData, - IN UINT32 OrData + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData ); /** @@ -827,9 +860,9 @@ PciCf8AndThenOr32 ( UINT32 EFIAPI PciCf8BitFieldRead32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -846,6 +879,7 @@ PciCf8BitFieldRead32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -860,10 +894,10 @@ PciCf8BitFieldRead32 ( UINT32 EFIAPI PciCf8BitFieldWrite32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value ); /** @@ -871,7 +905,7 @@ PciCf8BitFieldWrite32 ( writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -883,6 +917,7 @@ PciCf8BitFieldWrite32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -897,10 +932,10 @@ PciCf8BitFieldWrite32 ( UINT32 EFIAPI PciCf8BitFieldOr32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData ); /** @@ -920,6 +955,7 @@ PciCf8BitFieldOr32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -934,19 +970,19 @@ PciCf8BitFieldOr32 ( UINT32 EFIAPI PciCf8BitFieldAnd32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData ); /** Reads a bit field in a 32-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -959,6 +995,8 @@ PciCf8BitFieldAnd32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -974,11 +1012,11 @@ PciCf8BitFieldAnd32 ( UINT32 EFIAPI PciCf8BitFieldAndThenOr32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 AndData, - IN UINT32 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData ); /** @@ -988,7 +1026,7 @@ PciCf8BitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to read - from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration read cycles may be used at the beginning and the end of the range. @@ -1002,15 +1040,15 @@ PciCf8BitFieldAndThenOr32 ( @param Size Size in bytes of the transfer. @param Buffer Pointer to a buffer receiving the data read. - @return Size + @return Size read from StartAddress. **/ UINTN EFIAPI PciCf8ReadBuffer ( - IN UINTN StartAddress, - IN UINTN Size, - OUT VOID *Buffer + IN UINTN StartAddress, + IN UINTN Size, + OUT VOID *Buffer ); /** @@ -1021,7 +1059,7 @@ PciCf8ReadBuffer ( Size from the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrictions, + write from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration write cycles may be used at the beginning and the end of the range. @@ -1035,15 +1073,15 @@ PciCf8ReadBuffer ( @param Size Size in bytes of the transfer. @param Buffer Pointer to a buffer containing the data to write. - @return Size + @return Size written to StartAddress. **/ UINTN EFIAPI PciCf8WriteBuffer ( - IN UINTN StartAddress, - IN UINTN Size, - IN VOID *Buffer + IN UINTN StartAddress, + IN UINTN Size, + IN VOID *Buffer ); #endif