X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciCf8Lib.h;h=7e22a527a80e2b58bf2e0143ae9840a0ea555e9a;hp=fc98457b3beafa156154fb63eb19dc258af51086;hb=HEAD;hpb=9df063a06aef048c042498e2f542fb693e93493a
diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h
index fc98457b3b..05b5fddef5 100644
--- a/MdePkg/Include/Library/PciCf8Lib.h
+++ b/MdePkg/Include/Library/PciCf8Lib.h
@@ -1,25 +1,18 @@
/** @file
Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
-
- This library is identical to the PCI Library, except the access method for performing PCI
- configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
- access to PCI Segment #0.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
+ This library is identical to the PCI Library, except the access method for performing PCI
+ configuration cycles must be through I/O ports 0xCF8 and 0xCFC. This library only allows
+ access to PCI Segment #0.
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PCI_CF8_LIB_H__
#define __PCI_CF8_LIB_H__
-
/**
Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
address that can be passed to the PCI Library functions.
@@ -36,24 +29,24 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@return The encode PCI address.
**/
-#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \
+#define PCI_CF8_LIB_ADDRESS(Bus, Device, Function, Offset) \
(((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
/**
- Registers a PCI device so PCI configuration registers may be accessed after
+ Registers a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
- Registers the PCI device specified by Address so all the PCI configuration registers
+
+ Registers the PCI device specified by Address so all the PCI configuration registers
associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
-
+
If Address > 0x0FFFFFFF, then ASSERT().
If the register specified by Address >= 0x100, then ASSERT().
@param Address Address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.
@@ -86,7 +79,7 @@ PciCf8RegisterForRuntimeAccess (
UINT8
EFIAPI
PciCf8Read8 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -109,8 +102,8 @@ PciCf8Read8 (
UINT8
EFIAPI
PciCf8Write8 (
- IN UINTN Address,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINT8 Value
);
/**
@@ -137,8 +130,8 @@ PciCf8Write8 (
UINT8
EFIAPI
PciCf8Or8 (
- IN UINTN Address,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 OrData
);
/**
@@ -165,8 +158,8 @@ PciCf8Or8 (
UINT8
EFIAPI
PciCf8And8 (
- IN UINTN Address,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINT8 AndData
);
/**
@@ -195,9 +188,9 @@ PciCf8And8 (
UINT8
EFIAPI
PciCf8AndThenOr8 (
- IN UINTN Address,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -225,9 +218,9 @@ PciCf8AndThenOr8 (
UINT8
EFIAPI
PciCf8BitFieldRead8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -243,6 +236,7 @@ PciCf8BitFieldRead8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -257,10 +251,10 @@ PciCf8BitFieldRead8 (
UINT8
EFIAPI
PciCf8BitFieldWrite8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
);
/**
@@ -279,6 +273,7 @@ PciCf8BitFieldWrite8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -293,10 +288,10 @@ PciCf8BitFieldWrite8 (
UINT8
EFIAPI
PciCf8BitFieldOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
);
/**
@@ -315,6 +310,7 @@ PciCf8BitFieldOr8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -329,10 +325,10 @@ PciCf8BitFieldOr8 (
UINT8
EFIAPI
PciCf8BitFieldAnd8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
);
/**
@@ -353,6 +349,8 @@ PciCf8BitFieldAnd8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -368,11 +366,11 @@ PciCf8BitFieldAnd8 (
UINT8
EFIAPI
PciCf8BitFieldAndThenOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -395,7 +393,7 @@ PciCf8BitFieldAndThenOr8 (
UINT16
EFIAPI
PciCf8Read16 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -419,8 +417,8 @@ PciCf8Read16 (
UINT16
EFIAPI
PciCf8Write16 (
- IN UINTN Address,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINT16 Value
);
/**
@@ -448,8 +446,8 @@ PciCf8Write16 (
UINT16
EFIAPI
PciCf8Or16 (
- IN UINTN Address,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 OrData
);
/**
@@ -477,8 +475,8 @@ PciCf8Or16 (
UINT16
EFIAPI
PciCf8And16 (
- IN UINTN Address,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINT16 AndData
);
/**
@@ -508,9 +506,9 @@ PciCf8And16 (
UINT16
EFIAPI
PciCf8AndThenOr16 (
- IN UINTN Address,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -539,9 +537,9 @@ PciCf8AndThenOr16 (
UINT16
EFIAPI
PciCf8BitFieldRead16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -558,6 +556,7 @@ PciCf8BitFieldRead16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -572,10 +571,10 @@ PciCf8BitFieldRead16 (
UINT16
EFIAPI
PciCf8BitFieldWrite16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
);
/**
@@ -595,6 +594,7 @@ PciCf8BitFieldWrite16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -609,10 +609,10 @@ PciCf8BitFieldWrite16 (
UINT16
EFIAPI
PciCf8BitFieldOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
);
/**
@@ -632,6 +632,7 @@ PciCf8BitFieldOr16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -646,10 +647,10 @@ PciCf8BitFieldOr16 (
UINT16
EFIAPI
PciCf8BitFieldAnd16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
);
/**
@@ -671,6 +672,8 @@ PciCf8BitFieldAnd16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -686,11 +689,11 @@ PciCf8BitFieldAnd16 (
UINT16
EFIAPI
PciCf8BitFieldAndThenOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -713,7 +716,7 @@ PciCf8BitFieldAndThenOr16 (
UINT32
EFIAPI
PciCf8Read32 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -737,8 +740,8 @@ PciCf8Read32 (
UINT32
EFIAPI
PciCf8Write32 (
- IN UINTN Address,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINT32 Value
);
/**
@@ -766,8 +769,8 @@ PciCf8Write32 (
UINT32
EFIAPI
PciCf8Or32 (
- IN UINTN Address,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 OrData
);
/**
@@ -795,8 +798,8 @@ PciCf8Or32 (
UINT32
EFIAPI
PciCf8And32 (
- IN UINTN Address,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINT32 AndData
);
/**
@@ -826,9 +829,9 @@ PciCf8And32 (
UINT32
EFIAPI
PciCf8AndThenOr32 (
- IN UINTN Address,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -857,9 +860,9 @@ PciCf8AndThenOr32 (
UINT32
EFIAPI
PciCf8BitFieldRead32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -876,6 +879,7 @@ PciCf8BitFieldRead32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -890,10 +894,10 @@ PciCf8BitFieldRead32 (
UINT32
EFIAPI
PciCf8BitFieldWrite32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
);
/**
@@ -913,6 +917,7 @@ PciCf8BitFieldWrite32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -927,10 +932,10 @@ PciCf8BitFieldWrite32 (
UINT32
EFIAPI
PciCf8BitFieldOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
);
/**
@@ -950,6 +955,7 @@ PciCf8BitFieldOr32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -964,10 +970,10 @@ PciCf8BitFieldOr32 (
UINT32
EFIAPI
PciCf8BitFieldAnd32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
);
/**
@@ -989,6 +995,8 @@ PciCf8BitFieldAnd32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1004,11 +1012,11 @@ PciCf8BitFieldAnd32 (
UINT32
EFIAPI
PciCf8BitFieldAndThenOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -1018,7 +1026,7 @@ PciCf8BitFieldAndThenOr32 (
Size into the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be read. Size is
returned. When possible 32-bit PCI configuration read cycles are used to read
- from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit
and 16-bit PCI configuration read cycles may be used at the beginning and the
end of the range.
@@ -1038,9 +1046,9 @@ PciCf8BitFieldAndThenOr32 (
UINTN
EFIAPI
PciCf8ReadBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- OUT VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
);
/**
@@ -1051,7 +1059,7 @@ PciCf8ReadBuffer (
Size from the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be written. Size is
returned. When possible 32-bit PCI configuration write cycles are used to
- write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ write from StartAddress to StartAddress + Size. Due to alignment restrictions,
8-bit and 16-bit PCI configuration write cycles may be used at the beginning
and the end of the range.
@@ -1071,9 +1079,9 @@ PciCf8ReadBuffer (
UINTN
EFIAPI
PciCf8WriteBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- IN VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
);
#endif