X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciLib.h;h=836494b6c1d798e35914da3f60b5326fa7a1d18f;hp=d85acf52e072b6457fb84179f336930662b5fb9f;hb=HEAD;hpb=62991af27f84e5f20e55dee6e1f90eb77ec5325e
diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h
index d85acf52e0..382a3df5b2 100644
--- a/MdePkg/Include/Library/PciLib.h
+++ b/MdePkg/Include/Library/PciLib.h
@@ -1,23 +1,17 @@
/** @file
Provides services to access PCI Configuration Space.
-
- These functions perform PCI configuration cycles using the default PCI configuration
- access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
- or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some
- alternate access method. Modules will typically use the PCI Library for its PCI configuration
- accesses. However, if a module requires a mix of PCI access methods, the PCI CF8 Library or
- PCI Express Library may be used in conjunction with the PCI Library. The functionality of
- these three libraries is identical. The PCI CF8 Library and PCI Express Library simply use
- explicit access methods.
-Copyright (c) 2006 - 2008, Intel Corporation
-All rights reserved. This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
+ These functions perform PCI configuration cycles using the default PCI configuration
+ access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,
+ or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some
+ alternate access method. Modules will typically use the PCI Library for its PCI configuration
+ accesses. However, if a module requires a mix of PCI access methods, the PCI CF8 Library or
+ PCI Express Library may be used in conjunction with the PCI Library. The functionality of
+ these three libraries is identical. The PCI CF8 Library and PCI Express Library simply use
+ explicit access methods.
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -37,23 +31,23 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@return The encoded PCI address.
**/
-#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \
- (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+#define PCI_LIB_ADDRESS(Bus, Device, Function, Register) \
+ (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
/**
- Registers a PCI device so PCI configuration registers may be accessed after
+ Registers a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
- Registers the PCI device specified by Address so all the PCI configuration registers
+
+ Registers the PCI device specified by Address so all the PCI configuration registers
associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
-
+
If Address > 0x0FFFFFFF, then ASSERT().
@param Address Address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.
@@ -85,7 +79,7 @@ PciRegisterForRuntimeAccess (
UINT8
EFIAPI
PciRead8 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -107,8 +101,8 @@ PciRead8 (
UINT8
EFIAPI
PciWrite8 (
- IN UINTN Address,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINT8 Value
);
/**
@@ -134,8 +128,8 @@ PciWrite8 (
UINT8
EFIAPI
PciOr8 (
- IN UINTN Address,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 OrData
);
/**
@@ -161,13 +155,13 @@ PciOr8 (
UINT8
EFIAPI
PciAnd8 (
- IN UINTN Address,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINT8 AndData
);
/**
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
- value, followed a bitwise OR with another 8-bit value.
+ value, followed by a bitwise OR with another 8-bit value.
Reads the 8-bit PCI configuration register specified by Address, performs a
bitwise AND between the read result and the value specified by AndData,
@@ -190,9 +184,9 @@ PciAnd8 (
UINT8
EFIAPI
PciAndThenOr8 (
- IN UINTN Address,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -219,9 +213,9 @@ PciAndThenOr8 (
UINT8
EFIAPI
PciBitFieldRead8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -236,6 +230,7 @@ PciBitFieldRead8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -250,10 +245,10 @@ PciBitFieldRead8 (
UINT8
EFIAPI
PciBitFieldWrite8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
);
/**
@@ -271,6 +266,7 @@ PciBitFieldWrite8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -285,10 +281,10 @@ PciBitFieldWrite8 (
UINT8
EFIAPI
PciBitFieldOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
);
/**
@@ -306,6 +302,7 @@ PciBitFieldOr8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -320,10 +317,10 @@ PciBitFieldOr8 (
UINT8
EFIAPI
PciBitFieldAnd8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
);
/**
@@ -343,6 +340,8 @@ PciBitFieldAnd8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -358,11 +357,11 @@ PciBitFieldAnd8 (
UINT8
EFIAPI
PciBitFieldAndThenOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -384,7 +383,7 @@ PciBitFieldAndThenOr8 (
UINT16
EFIAPI
PciRead16 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -407,8 +406,8 @@ PciRead16 (
UINT16
EFIAPI
PciWrite16 (
- IN UINTN Address,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINT16 Value
);
/**
@@ -435,8 +434,8 @@ PciWrite16 (
UINT16
EFIAPI
PciOr16 (
- IN UINTN Address,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 OrData
);
/**
@@ -463,8 +462,8 @@ PciOr16 (
UINT16
EFIAPI
PciAnd16 (
- IN UINTN Address,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINT16 AndData
);
/**
@@ -493,9 +492,9 @@ PciAnd16 (
UINT16
EFIAPI
PciAndThenOr16 (
- IN UINTN Address,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -523,9 +522,9 @@ PciAndThenOr16 (
UINT16
EFIAPI
PciBitFieldRead16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -541,6 +540,7 @@ PciBitFieldRead16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -555,10 +555,10 @@ PciBitFieldRead16 (
UINT16
EFIAPI
PciBitFieldWrite16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
);
/**
@@ -577,6 +577,7 @@ PciBitFieldWrite16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -591,10 +592,10 @@ PciBitFieldWrite16 (
UINT16
EFIAPI
PciBitFieldOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
);
/**
@@ -613,6 +614,7 @@ PciBitFieldOr16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -627,10 +629,10 @@ PciBitFieldOr16 (
UINT16
EFIAPI
PciBitFieldAnd16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
);
/**
@@ -651,6 +653,8 @@ PciBitFieldAnd16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -666,11 +670,11 @@ PciBitFieldAnd16 (
UINT16
EFIAPI
PciBitFieldAndThenOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -692,7 +696,7 @@ PciBitFieldAndThenOr16 (
UINT32
EFIAPI
PciRead32 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -715,8 +719,8 @@ PciRead32 (
UINT32
EFIAPI
PciWrite32 (
- IN UINTN Address,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINT32 Value
);
/**
@@ -743,8 +747,8 @@ PciWrite32 (
UINT32
EFIAPI
PciOr32 (
- IN UINTN Address,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 OrData
);
/**
@@ -771,8 +775,8 @@ PciOr32 (
UINT32
EFIAPI
PciAnd32 (
- IN UINTN Address,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINT32 AndData
);
/**
@@ -801,9 +805,9 @@ PciAnd32 (
UINT32
EFIAPI
PciAndThenOr32 (
- IN UINTN Address,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -831,9 +835,9 @@ PciAndThenOr32 (
UINT32
EFIAPI
PciBitFieldRead32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -849,6 +853,7 @@ PciBitFieldRead32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -863,10 +868,10 @@ PciBitFieldRead32 (
UINT32
EFIAPI
PciBitFieldWrite32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
);
/**
@@ -885,6 +890,7 @@ PciBitFieldWrite32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -899,10 +905,10 @@ PciBitFieldWrite32 (
UINT32
EFIAPI
PciBitFieldOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
);
/**
@@ -921,6 +927,7 @@ PciBitFieldOr32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -935,10 +942,10 @@ PciBitFieldOr32 (
UINT32
EFIAPI
PciBitFieldAnd32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
);
/**
@@ -959,6 +966,8 @@ PciBitFieldAnd32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -974,11 +983,11 @@ PciBitFieldAnd32 (
UINT32
EFIAPI
PciBitFieldAndThenOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -988,7 +997,7 @@ PciBitFieldAndThenOr32 (
Size into the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be read. Size is
returned. When possible 32-bit PCI configuration read cycles are used to read
- from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit
and 16-bit PCI configuration read cycles may be used at the beginning and the
end of the range.
@@ -1007,9 +1016,9 @@ PciBitFieldAndThenOr32 (
UINTN
EFIAPI
PciReadBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- OUT VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
);
/**
@@ -1020,7 +1029,7 @@ PciReadBuffer (
Size from the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be written. Size is
returned. When possible 32-bit PCI configuration write cycles are used to
- write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ write from StartAddress to StartAddress + Size. Due to alignment restrictions,
8-bit and 16-bit PCI configuration write cycles may be used at the beginning
and the end of the range.
@@ -1039,9 +1048,9 @@ PciReadBuffer (
UINTN
EFIAPI
PciWriteBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- IN VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
);
#endif