X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciLib.h;h=836494b6c1d798e35914da3f60b5326fa7a1d18f;hp=f8e4b572f9c9cc25393e7d7404bf61095bd4bee2;hb=HEAD;hpb=94646ec0e39546f2b306bd07ca75b45ce714a671 diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h index f8e4b572f9..382a3df5b2 100644 --- a/MdePkg/Include/Library/PciLib.h +++ b/MdePkg/Include/Library/PciLib.h @@ -1,14 +1,17 @@ /** @file - PCI Library Services for PCI Segment #0 + Provides services to access PCI Configuration Space. - Copyright (c) 2006 - 2008, Intel Corporation - All rights reserved. This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php + These functions perform PCI configuration cycles using the default PCI configuration + access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, + or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some + alternate access method. Modules will typically use the PCI Library for its PCI configuration + accesses. However, if a module requires a mix of PCI access methods, the PCI CF8 Library or + PCI Express Library may be used in conjunction with the PCI Library. The functionality of + these three libraries is identical. The PCI CF8 Library and PCI Express Library simply use + explicit access methods. - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -28,8 +31,35 @@ @return The encoded PCI address. **/ -#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \ - (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) +#define PCI_LIB_ADDRESS(Bus, Device, Function, Register) \ + (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + +/** + Registers a PCI device so PCI configuration registers may be accessed after + SetVirtualAddressMap(). + + Registers the PCI device specified by Address so all the PCI configuration registers + associated with that PCI device may be accessed after SetVirtualAddressMap() is called. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @retval RETURN_SUCCESS The PCI device was registered for runtime access. + @retval RETURN_UNSUPPORTED An attempt was made to call this function + after ExitBootServices(). + @retval RETURN_UNSUPPORTED The resources required to access the PCI device + at runtime could not be mapped. + @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to + complete the registration. + +**/ +RETURN_STATUS +EFIAPI +PciRegisterForRuntimeAccess ( + IN UINTN Address + ); /** Reads an 8-bit PCI configuration register. @@ -49,7 +79,7 @@ UINT8 EFIAPI PciRead8 ( - IN UINTN Address + IN UINTN Address ); /** @@ -71,16 +101,16 @@ PciRead8 ( UINT8 EFIAPI PciWrite8 ( - IN UINTN Address, - IN UINT8 Value + IN UINTN Address, + IN UINT8 Value ); /** - Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -98,8 +128,8 @@ PciWrite8 ( UINT8 EFIAPI PciOr8 ( - IN UINTN Address, - IN UINT8 OrData + IN UINTN Address, + IN UINT8 OrData ); /** @@ -125,17 +155,17 @@ PciOr8 ( UINT8 EFIAPI PciAnd8 ( - IN UINTN Address, - IN UINT8 AndData + IN UINTN Address, + IN UINT8 AndData ); /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit - value, followed a bitwise inclusive OR with another 8-bit value. + value, followed by a bitwise OR with another 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -154,9 +184,9 @@ PciAnd8 ( UINT8 EFIAPI PciAndThenOr8 ( - IN UINTN Address, - IN UINT8 AndData, - IN UINT8 OrData + IN UINTN Address, + IN UINT8 AndData, + IN UINT8 OrData ); /** @@ -183,9 +213,9 @@ PciAndThenOr8 ( UINT8 EFIAPI PciBitFieldRead8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -200,6 +230,7 @@ PciBitFieldRead8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -214,10 +245,10 @@ PciBitFieldRead8 ( UINT8 EFIAPI PciBitFieldWrite8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 Value ); /** @@ -225,7 +256,7 @@ PciBitFieldWrite8 ( writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -235,6 +266,7 @@ PciBitFieldWrite8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -249,10 +281,10 @@ PciBitFieldWrite8 ( UINT8 EFIAPI PciBitFieldOr8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 OrData ); /** @@ -270,6 +302,7 @@ PciBitFieldOr8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -284,19 +317,19 @@ PciBitFieldOr8 ( UINT8 EFIAPI PciBitFieldAnd8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData ); /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -307,6 +340,8 @@ PciBitFieldAnd8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -322,11 +357,11 @@ PciBitFieldAnd8 ( UINT8 EFIAPI PciBitFieldAndThenOr8 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT8 AndData, - IN UINT8 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT8 AndData, + IN UINT8 OrData ); /** @@ -348,7 +383,7 @@ PciBitFieldAndThenOr8 ( UINT16 EFIAPI PciRead16 ( - IN UINTN Address + IN UINTN Address ); /** @@ -371,16 +406,16 @@ PciRead16 ( UINT16 EFIAPI PciWrite16 ( - IN UINTN Address, - IN UINT16 Value + IN UINTN Address, + IN UINT16 Value ); /** - Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -399,8 +434,8 @@ PciWrite16 ( UINT16 EFIAPI PciOr16 ( - IN UINTN Address, - IN UINT16 OrData + IN UINTN Address, + IN UINT16 OrData ); /** @@ -427,17 +462,17 @@ PciOr16 ( UINT16 EFIAPI PciAnd16 ( - IN UINTN Address, - IN UINT16 AndData + IN UINTN Address, + IN UINT16 AndData ); /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit - value, followed a bitwise inclusive OR with another 16-bit value. + value, followed a bitwise OR with another 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -457,9 +492,9 @@ PciAnd16 ( UINT16 EFIAPI PciAndThenOr16 ( - IN UINTN Address, - IN UINT16 AndData, - IN UINT16 OrData + IN UINTN Address, + IN UINT16 AndData, + IN UINT16 OrData ); /** @@ -487,9 +522,9 @@ PciAndThenOr16 ( UINT16 EFIAPI PciBitFieldRead16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -505,6 +540,7 @@ PciBitFieldRead16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -519,10 +555,10 @@ PciBitFieldRead16 ( UINT16 EFIAPI PciBitFieldWrite16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 Value ); /** @@ -530,7 +566,7 @@ PciBitFieldWrite16 ( writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -541,6 +577,7 @@ PciBitFieldWrite16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -555,10 +592,10 @@ PciBitFieldWrite16 ( UINT16 EFIAPI PciBitFieldOr16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 OrData ); /** @@ -577,6 +614,7 @@ PciBitFieldOr16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -591,19 +629,19 @@ PciBitFieldOr16 ( UINT16 EFIAPI PciBitFieldAnd16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData ); /** Reads a bit field in a 16-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -615,6 +653,8 @@ PciBitFieldAnd16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -630,11 +670,11 @@ PciBitFieldAnd16 ( UINT16 EFIAPI PciBitFieldAndThenOr16 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT16 AndData, - IN UINT16 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT16 AndData, + IN UINT16 OrData ); /** @@ -656,7 +696,7 @@ PciBitFieldAndThenOr16 ( UINT32 EFIAPI PciRead32 ( - IN UINTN Address + IN UINTN Address ); /** @@ -679,16 +719,16 @@ PciRead32 ( UINT32 EFIAPI PciWrite32 ( - IN UINTN Address, - IN UINT32 Value + IN UINTN Address, + IN UINT32 Value ); /** - Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -707,8 +747,8 @@ PciWrite32 ( UINT32 EFIAPI PciOr32 ( - IN UINTN Address, - IN UINT32 OrData + IN UINTN Address, + IN UINT32 OrData ); /** @@ -735,17 +775,17 @@ PciOr32 ( UINT32 EFIAPI PciAnd32 ( - IN UINTN Address, - IN UINT32 AndData + IN UINTN Address, + IN UINT32 AndData ); /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit - value, followed a bitwise inclusive OR with another 32-bit value. + value, followed a bitwise OR with another 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -765,9 +805,9 @@ PciAnd32 ( UINT32 EFIAPI PciAndThenOr32 ( - IN UINTN Address, - IN UINT32 AndData, - IN UINT32 OrData + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData ); /** @@ -795,9 +835,9 @@ PciAndThenOr32 ( UINT32 EFIAPI PciBitFieldRead32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit ); /** @@ -813,6 +853,7 @@ PciBitFieldRead32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -827,10 +868,10 @@ PciBitFieldRead32 ( UINT32 EFIAPI PciBitFieldWrite32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 Value + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 Value ); /** @@ -838,7 +879,7 @@ PciBitFieldWrite32 ( writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -849,6 +890,7 @@ PciBitFieldWrite32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -863,10 +905,10 @@ PciBitFieldWrite32 ( UINT32 EFIAPI PciBitFieldOr32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 OrData ); /** @@ -885,6 +927,7 @@ PciBitFieldOr32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -899,19 +942,19 @@ PciBitFieldOr32 ( UINT32 EFIAPI PciBitFieldAnd32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 AndData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData ); /** Reads a bit field in a 32-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -923,6 +966,8 @@ PciBitFieldAnd32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -938,11 +983,11 @@ PciBitFieldAnd32 ( UINT32 EFIAPI PciBitFieldAndThenOr32 ( - IN UINTN Address, - IN UINTN StartBit, - IN UINTN EndBit, - IN UINT32 AndData, - IN UINT32 OrData + IN UINTN Address, + IN UINTN StartBit, + IN UINTN EndBit, + IN UINT32 AndData, + IN UINT32 OrData ); /** @@ -952,7 +997,7 @@ PciBitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to read - from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration read cycles may be used at the beginning and the end of the range. @@ -971,9 +1016,9 @@ PciBitFieldAndThenOr32 ( UINTN EFIAPI PciReadBuffer ( - IN UINTN StartAddress, - IN UINTN Size, - OUT VOID *Buffer + IN UINTN StartAddress, + IN UINTN Size, + OUT VOID *Buffer ); /** @@ -984,7 +1029,7 @@ PciReadBuffer ( Size from the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrictions, + write from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration write cycles may be used at the beginning and the end of the range. @@ -997,15 +1042,15 @@ PciReadBuffer ( @param Size Size in bytes of the transfer. @param Buffer Pointer to a buffer containing the data to write. - @return Size + @return Size written to StartAddress. **/ UINTN EFIAPI PciWriteBuffer ( - IN UINTN StartAddress, - IN UINTN Size, - IN VOID *Buffer + IN UINTN StartAddress, + IN UINTN Size, + IN VOID *Buffer ); #endif