X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FLibrary%2FBaseLib%2FArm%2FEnableInterrupts.S;h=5de3b09459c15fa4cbd661e2ab0c79dce2d395d1;hp=b4115e802b3e7bdb14c6582020bf80494572e4f0;hb=9344f0921518309295da89c221d10cbead8531aa;hpb=64698eb8415e6829b956a12c3883655acc02f5a7

diff --git a/MdePkg/Library/BaseLib/Arm/EnableInterrupts.S b/MdePkg/Library/BaseLib/Arm/EnableInterrupts.S
index b4115e802b..5de3b09459 100644
--- a/MdePkg/Library/BaseLib/Arm/EnableInterrupts.S
+++ b/MdePkg/Library/BaseLib/Arm/EnableInterrupts.S
@@ -1,36 +1,30 @@
-#------------------------------------------------------------------------------ 
-#
-# EnableInterrupts() for ARM
-#
-# Copyright (c) 2006 - 2009, Intel Corporation<BR>
-# Portions copyright (c) 2008-2009 Apple Inc.<BR>
-# All rights reserved. This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-.text
-.p2align 2
-.globl ASM_PFX(EnableInterrupts)
-
-
-#/**
-#  Enables CPU interrupts.
-#
-#**/
-#VOID
-#EFIAPI
-#EnableInterrupts (
-#  VOID
-#  );
-#
-ASM_PFX(EnableInterrupts):
-    mrs  R0,CPSR
-    bic  R0,R0,#0x80		@Enable IRQ interrupts
-    msr  CPSR_c,R0
-    bx   LR
+#------------------------------------------------------------------------------
+#
+# EnableInterrupts() for ARM
+#
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#------------------------------------------------------------------------------
+
+.text
+.p2align 2
+GCC_ASM_EXPORT(EnableInterrupts)
+
+
+#/**
+#  Enables CPU interrupts.
+#
+#**/
+#VOID
+#EFIAPI
+#EnableInterrupts (
+#  VOID
+#  );
+#
+ASM_PFX(EnableInterrupts):
+    mrs  R0,CPSR
+    bic  R0,R0,#0x80    @Enable IRQ interrupts
+    msr  CPSR_c,R0
+    bx   LR