X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=MdePkg%2FLibrary%2FPeiPciLibPciCfg2%2FPciLib.c;h=4154f7abcc1ddebf59f32b3073c89a811087cf31;hp=689a2299a310d5fe2579365b80bb4f74641a7cc8;hb=9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107;hpb=94952554cc604750f3df3d4e8ae068703481d258 diff --git a/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c b/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c index 689a2299a3..4154f7abcc 100644 --- a/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c +++ b/MdePkg/Library/PeiPciLibPciCfg2/PciLib.c @@ -1,13 +1,13 @@ /** @file PCI Library using PCI CFG2 PPI. - Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.
+ Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php. - + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. @@ -90,7 +90,7 @@ PeiPciLibPciCfg2ReadWorker ( This function wraps EFI_PEI_PCI_CFG2_PPI.Write() service. It writes the PCI configuration register specified by Address with the - value specified by Data. The width of data is specifed by Width. + value specified by Data. The width of data is specified by Width. Data is returned. @param Address The address that encodes the PCI Bus, Device, Function and @@ -129,19 +129,19 @@ PeiPciLibPciCfg2WriteWorker ( } /** - Registers a PCI device so PCI configuration registers may be accessed after + Registers a PCI device so PCI configuration registers may be accessed after SetVirtualAddressMap(). - - Registers the PCI device specified by Address so all the PCI configuration registers + + Registers the PCI device specified by Address so all the PCI configuration registers associated with that PCI device may be accessed after SetVirtualAddressMap() is called. - + If Address > 0x0FFFFFFF, then ASSERT(). @param Address The address that encodes the PCI Bus, Device, Function and Register. - + @retval RETURN_SUCCESS The PCI device was registered for runtime access. - @retval RETURN_UNSUPPORTED An attempt was made to call this function + @retval RETURN_UNSUPPORTED An attempt was made to call this function after ExitBootServices(). @retval RETURN_UNSUPPORTED The resources required to access the PCI device at runtime could not be mapped.