X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=NetworkPkg%2FSnpDxe%2FCallback.c;fp=NetworkPkg%2FSnpDxe%2FCallback.c;h=99b7fd3ef8357cb547f81b520bc40ac8ad4996ce;hp=0c0b81fdca8ee5d9bdf0183f67d217e301ca45c5;hb=df4f154da9cb193b8e539157d1ed1a851cf1488e;hpb=ca08f3d4533caf152170fe9ec0ce585e452d995e

diff --git a/NetworkPkg/SnpDxe/Callback.c b/NetworkPkg/SnpDxe/Callback.c
index 0c0b81fdca..99b7fd3ef8 100644
--- a/NetworkPkg/SnpDxe/Callback.c
+++ b/NetworkPkg/SnpDxe/Callback.c
@@ -4,6 +4,7 @@
   stores the interface context for the NIC that snp is trying to talk.
 
 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -115,47 +116,59 @@ SnpUndi32CallbackMemio (
 
   switch (ReadOrWrite) {
   case PXE_IO_READ:
-    Snp->PciIo->Io.Read (
-                     Snp->PciIo,
-                     Width,
-                     Snp->IoBarIndex,      // BAR 1 (for 32bit regs), IO base address
-                     MemOrPortAddr,
-                     1,                    // count
-                     (VOID *) (UINTN) BufferPtr
-                     );
+    ASSERT (Snp->IoBarIndex < PCI_MAX_BAR);
+    if (Snp->IoBarIndex < PCI_MAX_BAR) {
+      Snp->PciIo->Io.Read (
+                       Snp->PciIo,
+                       Width,
+                       Snp->IoBarIndex,      // BAR 1 (for 32bit regs), IO base address
+                       MemOrPortAddr,
+                       1,                    // count
+                       (VOID *) (UINTN) BufferPtr
+                       );
+    }
     break;
 
   case PXE_IO_WRITE:
-    Snp->PciIo->Io.Write (
-                     Snp->PciIo,
-                     Width,
-                     Snp->IoBarIndex,      // BAR 1 (for 32bit regs), IO base address
-                     MemOrPortAddr,
-                     1,                    // count
-                     (VOID *) (UINTN) BufferPtr
-                     );
+    ASSERT (Snp->IoBarIndex < PCI_MAX_BAR);
+    if (Snp->IoBarIndex < PCI_MAX_BAR) {
+      Snp->PciIo->Io.Write (
+                       Snp->PciIo,
+                       Width,
+                       Snp->IoBarIndex,      // BAR 1 (for 32bit regs), IO base address
+                       MemOrPortAddr,
+                       1,                    // count
+                       (VOID *) (UINTN) BufferPtr
+                       );
+    }
     break;
 
   case PXE_MEM_READ:
-    Snp->PciIo->Mem.Read (
-                      Snp->PciIo,
-                      Width,
-                      Snp->MemoryBarIndex,  // BAR 0, Memory base address
-                      MemOrPortAddr,
-                      1,                    // count
-                      (VOID *) (UINTN) BufferPtr
-                      );
+    ASSERT (Snp->MemoryBarIndex < PCI_MAX_BAR);
+    if (Snp->MemoryBarIndex < PCI_MAX_BAR) {
+      Snp->PciIo->Mem.Read (
+                        Snp->PciIo,
+                        Width,
+                        Snp->MemoryBarIndex,  // BAR 0, Memory base address
+                        MemOrPortAddr,
+                        1,                    // count
+                        (VOID *) (UINTN) BufferPtr
+                        );
+    }
     break;
 
   case PXE_MEM_WRITE:
-    Snp->PciIo->Mem.Write (
-                      Snp->PciIo,
-                      Width,
-                      Snp->MemoryBarIndex,  // BAR 0, Memory base address
-                      MemOrPortAddr,
-                      1,                    // count
-                      (VOID *) (UINTN) BufferPtr
-                      );
+    ASSERT (Snp->MemoryBarIndex < PCI_MAX_BAR);
+    if (Snp->MemoryBarIndex < PCI_MAX_BAR) {
+      Snp->PciIo->Mem.Write (
+                        Snp->PciIo,
+                        Width,
+                        Snp->MemoryBarIndex,  // BAR 0, Memory base address
+                        MemOrPortAddr,
+                        1,                    // count
+                        (VOID *) (UINTN) BufferPtr
+                        );
+    }
     break;
   }