X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=Omap35xxPkg%2FInterruptDxe%2FHardwareInterrupt.c;h=2ddc7c0566d090162b011703c29e60b5d0862e3e;hp=e9d84aeabb698960d4936c4e95a42101e8b4399b;hb=f33d5d68abc02727dc828c1079e72ab65e1d63af;hpb=3402aac7d985bf8a9f9d3c639f3fe93609380513 diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c index e9d84aeabb..2ddc7c0566 100644 --- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c +++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c @@ -237,7 +237,7 @@ EndOfInterrupt ( ) { MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR); - ArmDataSyncronizationBarrier (); + ArmDataSynchronizationBarrier (); return EFI_SUCCESS; } @@ -267,7 +267,7 @@ IrqInterruptHandler ( // Needed to prevent infinite nesting when Time Driver lowers TPL MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR); - ArmDataSyncronizationBarrier (); + ArmDataSynchronizationBarrier (); InterruptHandler = gRegisteredInterruptHandlers[Vector]; if (InterruptHandler != NULL) { @@ -277,7 +277,7 @@ IrqInterruptHandler ( // Needed to clear after running the handler MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR); - ArmDataSyncronizationBarrier (); + ArmDataSynchronizationBarrier (); } // @@ -296,6 +296,54 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = { EndOfInterrupt }; +STATIC VOID *mCpuArchProtocolNotifyEventRegistration; + +STATIC +VOID +EFIAPI +CpuArchEventProtocolNotify ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_CPU_ARCH_PROTOCOL *Cpu; + EFI_STATUS Status; + + // + // Get the CPU protocol that this driver requires. + // + Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: gBS->LocateProtocol() - %r\n", __FUNCTION__, + Status)); + ASSERT (FALSE); + return; + } + + // + // Unregister the default exception handler. + // + Status = Cpu->RegisterInterruptHandler (Cpu, EXCEPT_ARM_IRQ, NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", + __FUNCTION__, Status)); + ASSERT (FALSE); + return; + } + + // + // Register to receive interrupts + // + Status = Cpu->RegisterInterruptHandler (Cpu, EXCEPT_ARM_IRQ, + IrqInterruptHandler); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n", + __FUNCTION__, Status)); + ASSERT (FALSE); + return; + } +} + /** Initialize the state information for the CPU Architectural Protocol @@ -314,7 +362,7 @@ InterruptDxeInitialize ( ) { EFI_STATUS Status; - EFI_CPU_ARCH_PROTOCOL *Cpu; + EFI_EVENT CpuArchEvent; // Make sure the Interrupt Controller Protocol is not already installed in the system. ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid); @@ -331,26 +379,23 @@ InterruptDxeInitialize ( ASSERT_EFI_ERROR(Status); // - // Get the CPU protocol that this driver requires. - // - Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); - ASSERT_EFI_ERROR(Status); - - // - // Unregister the default exception handler. - // - Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL); - ASSERT_EFI_ERROR(Status); - - // - // Register to receive interrupts + // Install the interrupt handler as soon as the CPU arch protocol appears. // - Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler); - ASSERT_EFI_ERROR(Status); + CpuArchEvent = EfiCreateProtocolNotifyEvent ( + &gEfiCpuArchProtocolGuid, + TPL_CALLBACK, + CpuArchEventProtocolNotify, + NULL, + &mCpuArchProtocolNotifyEventRegistration + ); + ASSERT (CpuArchEvent != NULL); // Register for an ExitBootServicesEvent Status = gBS->CreateEvent(EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - ASSERT_EFI_ERROR(Status); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + gBS->CloseEvent (CpuArchEvent); + } return Status; }