X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=PcAtChipsetPkg%2FPcAtChipsetPkg.dec;h=0e66ff0ba3770cf765cfe36d592151d72eaa238a;hp=7bf0760c5fd302cc974548660aa81b33507d43c9;hb=76c09700edc67686b29662e81a3ca7d947594ce5;hpb=9325f68430361597e811f2ae2ad88a4b3440da09
diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index 7bf0760c5f..0e66ff0ba3 100644
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -4,7 +4,8 @@
# This package is designed to public interfaces and implementation which follows
# PcAt defacto standard.
#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Inc. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -19,6 +20,7 @@
[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = PcAtChipsetPkg
+ PACKAGE_UNI_FILE = PcAtChipsetPkg.uni
PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
PACKAGE_VERSION = 0.3
@@ -29,64 +31,176 @@
## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.
#
IoApicLib|Include/Library/IoApicLib.h
-
+
[Guids]
gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
+#
+# [Error.gPcAtChipsetPkgTokenSpaceGuid]
+# 0x80000001 | Invalid value provided.
+#
+
[PcdsFeatureFlag]
- ## If TRUE, then the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them.
- # If FALSE, then the HPET Timer will be configued to use I/O APIC interrupts.
+ ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.
+ # TRUE - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.
+ # FALSE - Configures the HPET Timer to use I/O APIC interrupts.
+ # @Prompt Configure HPET to use MSI.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
-
+
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
- ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined
+ ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined
# 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;
- # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.
- # 2) If platform install CSM and use thunk module:
- # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
- # should be opened as 0.
- # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 2, then
- # the value should be set to 0xFFFC
+ # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.
+ # 2) If platform install CSM and use thunk module:
+ # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
+ # should be opened as 0.
+ # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then
+ # the value should be set to 0xFFFC.
# b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set
- # to 0xFFFF or 0xFFFE.
+ # to 0xFFFF or 0xFFFE.
#
# The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely
- # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
- # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.
- #
+ # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
+ # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.
+ # @Prompt 8259 Legacy Mode mask.
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001
-
+
## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.
+ # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
+ # @Prompt 8259 Legacy Mode edge level.
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002
- ## This PCD specifies whether we need enable IsaAcpiCom1 device.
+ ## Indicates if we need enable IsaAcpiCom1 device.
+ # TRUE - Enables IsaAcpiCom1 device.
+ # FALSE - Doesn't enable IsaAcpiCom1 device.
+ # @Prompt Enable IsaAcpiCom1 device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003
- ## This PCD specifies whether we need enable IsaAcpiCom2 device.
+ ## Indicates if we need enable IsaAcpiCom2 device.
+ # TRUE - Enables IsaAcpiCom2 device.
+ # FALSE - Doesn't enable IsaAcpiCom2 device.
+ # @Prompt Enable IsaAcpiCom12 device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004
- ## This PCD specifies whether we need enable IsaAcpiPs2Keyboard device.
+ ## Indicates if we need enable IsaAcpiPs2Keyboard device.
+ # TRUE - Enables IsaAcpiPs2Keyboard device.
+ # FALSE - Doesn't enable IsaAcpiPs2Keyboard device.
+ # @Prompt Enable IsaAcpiPs2Keyboard device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005
- ## This PCD specifies whether we need enable IsaAcpiPs2Mouse device.
+ ## Indicates if we need enable IsaAcpiPs2Mouse device.
+ # TRUE - Enables IsaAcpiPs2Mouse device.
+ # FALSE - Doesn't enable IsaAcpiPs2Mouse device.
+ # @Prompt Enable IsaAcpiPs2Mouse device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006
- ## This PCD specifies whether we need enable IsaAcpiFloppyA device.
+ ## Indicates if we need enable IsaAcpiFloppyA device.
+ # TRUE - Enables IsaAcpiFloppyA device.
+ # FALSE - Doesn't enable IsaAcpiFloppyA device.
+ # @Prompt Enable IsaAcpiFloppyA device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007
- ## This PCD specifies whether we need enable IsaAcpiFloppyB device.
+ ## Indicates if we need enable IsaAcpiFloppyB device.
+ # TRUE - Enables IsaAcpiFloppyB device.
+ # FALSE - Doesn't enable IsaAcpiFloppyB device.
+ # @Prompt Enable IsaAcpiFloppyB device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008
## This PCD specifies the base address of the HPET timer.
+ # @Prompt HPET base address.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
+ # @Prompt HPET local APIC vector.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
# The default value of 100000 100 ns units is the same as 10 ms.
+ # @Prompt Default period of HPET timer.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
-
- ## This PCD specifies the base address of the HPET timer.
+
+ ## This PCD specifies the base address of the IO APIC.
+ # @Prompt IO APIC base address.
gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
-
+
+ ## This PCD specifies the minimal valid year in RTC.
+ # @Prompt Minimal valid year in RTC.
+ gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear|1998|UINT16|0x0000000D
+
+ ## This PCD specifies the maximal valid year in RTC.
+ # @Prompt Maximal valid year in RTC.
+ # @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100
+ gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E
+
+[PcdsFixedAtBuild, PcdsPatchableInModule]
+ ## Defines the ACPI register set base address.
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.
+ # @Prompt ACPI Timer IO Port Address
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010
+
+ ## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
+ # @Prompt ACPI Hardware PCI Bus Number
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011
+
+ ## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
+ # The invalid 0xFF is as its default value. It must be configured to the real value.
+ # @Prompt ACPI Hardware PCI Device Number
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012
+
+ ## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
+ # The invalid 0xFF is as its default value. It must be configured to the real value.
+ # @Prompt ACPI Hardware PCI Function Number
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013
+
+ ## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.
+ # @Prompt ACPI Hardware PCI Register Offset
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
+
+ ## Defines the bit mask that must be set to enable the APIC hardware register BAR.
+ # @Prompt ACPI Hardware PCI Bar Enable BitMask
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015
+
+ ## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.
+ # @Prompt ACPI Hardware PCI Bar Register Offset
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016
+
+ ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
+ # @Prompt Offset to 32-bit Timer register in ACPI BAR
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
+
+ ## Defines the bit mask to retrieve ACPI IO Port Base Address
+ # @Prompt ACPI IO Port Base Address Mask
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask |0xFFFE|UINT16|0x00000018
+
+ ## Reset Control Register address in I/O space.
+ # @Prompt Reset Control Register address
+ gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlRegister|0x64|UINT64|0x00000019
+
+ ## 8bit Reset Control Register value for cold reset.
+ # @Prompt Reset Control Register value for cold reset
+ gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0x0000001A
+
+ ## Specifies the initial value for Register_A in RTC.
+ # @Prompt Initial value for Register_A in RTC.
+ gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0000001B
+
+ ## Specifies the initial value for Register_B in RTC.
+ # @Prompt Initial value for Register_B in RTC.
+ gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0000001C
+
+ ## Specifies the initial value for Register_D in RTC.
+ # @Prompt Initial value for Register_D in RTC.
+ gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D
+
+ ## Specifies RTC Index Register address in I/O space.
+ # @Prompt RTC Index Register address
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|0x70|UINT8|0x0000001E
+
+ ## Specifies RTC Target Register address in I/O space.
+ # @Prompt RTC Target Register address
+ gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ PcAtChipsetPkgExtra.uni