X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=UefiCpuPkg%2FLibrary%2FCpuCommonFeaturesLib%2FMachineCheck.c;h=cc64dbbf0a1f2d3e6bc06d642bc353a77d133fd6;hp=72f665d32e36ec442dec20deb307622405ae4e68;hb=dc7363f848158564d8404c415061acf8c51ceb45;hpb=80c4b236389fb246dfd5c4f28e625600974a575d

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index 72f665d32e..cc64dbbf0a 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -1,7 +1,7 @@
 /** @file
   Machine Check features.
 
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -105,6 +105,9 @@ McaSupport (
   IN VOID                              *ConfigData  OPTIONAL
   )
 {
+  if (!MceSupport (ProcessorNumber, CpuInfo, ConfigData)) {
+    return FALSE;
+  }
   return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA == 1);
 }
 
@@ -137,25 +140,27 @@ McaInitialize (
   MSR_IA32_MCG_CAP_REGISTER  McgCap;
   UINT32                     BankIndex;
 
-  McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
-  for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
-    CPU_REGISTER_TABLE_WRITE64 (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_MC0_CTL + BankIndex * 4,
-      MAX_UINT64
-      );
-  }
-
-  if (PcdGetBool (PcdIsPowerOnReset)) {
-    for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {
+  if (State == TRUE) {
+    McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+    for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
       CPU_REGISTER_TABLE_WRITE64 (
         ProcessorNumber,
         Msr,
-        MSR_IA32_MC0_STATUS + BankIndex * 4,
-        0
+        MSR_IA32_MC0_CTL + BankIndex * 4,
+        MAX_UINT64
         );
     }
+
+    if (PcdGetBool (PcdIsPowerOnReset)) {
+      for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {
+        CPU_REGISTER_TABLE_WRITE64 (
+          ProcessorNumber,
+          Msr,
+          MSR_IA32_MC0_STATUS + BankIndex * 4,
+          0
+          );
+      }
+    }
   }
 
   return RETURN_SUCCESS;
@@ -229,3 +234,84 @@ McgCtlInitialize (
   return RETURN_SUCCESS;
 }
 
+/**
+  Detects if Local machine check exception feature supported on current 
+  processor.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+
+  @retval TRUE     Local machine check exception feature is supported.
+  @retval FALSE    Local machine check exception feature is not supported.
+
+  @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+LmceSupport (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData  OPTIONAL
+  )
+{
+  MSR_IA32_MCG_CAP_REGISTER    McgCap;
+
+  if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
+    return FALSE;
+  }
+
+  McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
+  if (ProcessorNumber == 0) {
+    DEBUG ((EFI_D_INFO, "LMCE eanble = %x\n", (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0)));
+  }
+  return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0);
+}
+
+/**
+  Initializes Local machine check exception feature to specific state.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+  @param[in]  State            If TRUE, then the Local machine check exception
+                               feature must be enabled.
+                               If FALSE, then the Local machine check exception
+                               feature must be disabled.
+
+  @retval RETURN_SUCCESS       Local machine check exception feature is initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+LmceInitialize (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData,  OPTIONAL
+  IN BOOLEAN                           State
+  )
+{
+  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
+
+  ASSERT (ConfigData != NULL);
+  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
+  if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
+    CPU_REGISTER_TABLE_WRITE_FIELD (
+      ProcessorNumber,
+      Msr,
+      MSR_IA32_FEATURE_CONTROL,
+      MSR_IA32_FEATURE_CONTROL_REGISTER,
+      Bits.LmceOn,
+      (State) ? 1 : 0
+      );
+  }
+  return RETURN_SUCCESS;
+}